This dissertation proposes a cross-layer framework able to synergistically optimize resilience and power consumption of processor-based systems. It is composed of three building blocks: SWIELD multimodal flip-flop (FF), System Operation Management Unit (SOMU) and Framework Function Library (FFL). Implementation of the building blocks is performed at circuit, architecture and software layer of the system stack respectively. The SWIELD FF can be configured to operate as a regular flip-flop or as an enhanced flip-flop for protection against timing/radiation-induced faults. It is necessary to perform replacement of selected timing-critical flip-flops in a system with SWIELD FFs during design time. When the system is active, the SWIELD FFs opera...
We introduce a new design metric called system-resiliency which characterizes the maximum unpredicta...
Efficiency of modern multiprocessor systems is hurt by unpredictable events: aging causes permanent ...
In the thesis the design of process tolerant, use-aware radio-frequency front-ends were explored. Fi...
This dissertation proposes a cross-layer framework able to synergistically optimize resilience and p...
Despite the numerous benefits that Integrated Circuit (IC) technology downscaling brings, it also in...
Since electronics started to scale down, a growing concern about the reliability of these electronic...
The number of cores per processor continues to increase due to higher integration rates and smaller ...
Multi- and manycore processors promise to combine high overall peak performance with moderate power ...
Mehr- und Vielkernplattformen bieten ausreichend Ressourcen für eine weitere Steigerung der Rechenle...
Embedded networks are systems that consist of communicating nodes specialized for certain purposes. ...
Electricity is an essential element in today’s society, and to ensure its availability, Intelligent ...
The context of this thesis is the mapping of tasks on multicore architectures and taking fault toler...
Power and reliability issues are expected to increase in future multicore systems with a higher degr...
abstract: Multicore processors have proliferated in nearly all forms of computing, from servers, des...
The ever-increasing miniaturization of semiconductors has led to important advances in mobile, cloud...
We introduce a new design metric called system-resiliency which characterizes the maximum unpredicta...
Efficiency of modern multiprocessor systems is hurt by unpredictable events: aging causes permanent ...
In the thesis the design of process tolerant, use-aware radio-frequency front-ends were explored. Fi...
This dissertation proposes a cross-layer framework able to synergistically optimize resilience and p...
Despite the numerous benefits that Integrated Circuit (IC) technology downscaling brings, it also in...
Since electronics started to scale down, a growing concern about the reliability of these electronic...
The number of cores per processor continues to increase due to higher integration rates and smaller ...
Multi- and manycore processors promise to combine high overall peak performance with moderate power ...
Mehr- und Vielkernplattformen bieten ausreichend Ressourcen für eine weitere Steigerung der Rechenle...
Embedded networks are systems that consist of communicating nodes specialized for certain purposes. ...
Electricity is an essential element in today’s society, and to ensure its availability, Intelligent ...
The context of this thesis is the mapping of tasks on multicore architectures and taking fault toler...
Power and reliability issues are expected to increase in future multicore systems with a higher degr...
abstract: Multicore processors have proliferated in nearly all forms of computing, from servers, des...
The ever-increasing miniaturization of semiconductors has led to important advances in mobile, cloud...
We introduce a new design metric called system-resiliency which characterizes the maximum unpredicta...
Efficiency of modern multiprocessor systems is hurt by unpredictable events: aging causes permanent ...
In the thesis the design of process tolerant, use-aware radio-frequency front-ends were explored. Fi...