Design and characterisation of High-Voltage CMOS (HV-CMOS) detectors for particle physics experiments

As particle searches and physics requirements in high energy particle physics experiments become more sophisticated, particle tracking detectors that are more precise, accurate, and resilient must be developed while remaining cost-effective. One promising candidate for producing future silicon particle tracking detectors is High- Voltage Complementary Metal-Oxide-Semiconductor (HV-CMOS) technology. This technology is emerging within the particle physics community and has been selected for the Mu3e experiment and proposed for use in the upgraded LHCb experiment at the High-Luminosity Large Hadron Collider (HL-LHC) at CERN. Commercialised technologies such as HV-CMOS benefit from a relatively fast, low-cost manufacturing process when compared to bespoke techniques used in the production of the current state-of-the-art hybrid pixel detector modules. Unlike hybrids, detectors fabricated in HV-CMOS technologies implement readout electronics into the same substrate used for particle sensing. Detectors, therefore, require no costly additional assembly and, on top of this, can be very thin, decreasing multiple scattering experienced by traversing particles, for example. In recent years, HV-CMOS pixel detectors have demonstrated excellent radiation tolerance however, there is still room for improvement, as it is currently approximately one order of magnitude lower than that of hybrids. HV-CMOS pixel detectors therefore cannot entirely replace hybrids in the new generation of collider experiments as they are and consequently cannot be used for the inner layers of silicon trackers in future experiments where radiation tolerance requirements are even higher. One of the ways hybrid detectors mitigate radiation damage effects is by increasing the operating voltage, which is typically much higher than is currently possible with HV-CMOS detectors. Work in this thesis is aimed at increasing the breakdown voltage of HV-CMOS pixel detectors in an effort to increase their operating voltage and, therefore, their radiation tolerance. In this way, it might one day be possible to use the technology to produce particle tracking detectors that exhibit qualities attributed to both hybrid and HV-CMOS detectors: very thin, highly radiation tolerant detectors, with small pixels, and excellent time resolution, that are also relatively inexpensive to produce in very large quantities. In this thesis, a methodology for quickly and accurately recreating HV-CMOS pixels using Technology Computer-Aided Design (TCAD) simulations is presented. The resulting TCAD structures were used to aid in the design of the second prototype developed within the CERN RD50 collaboration, RD50-MPW2. Additionally, Edge Transient Cur- rent Technique (e-TCT) measurements of backside biased HV-CMOS pixel detectors are presented, which facilitated the development of a new HV-CMOS detector prototype UKRI-MPW0. The simulations and design of UKRI-MPW0 are presented, and measurements of fabricated samples demonstrate a breakdown voltage > 600 V. An irradiation campaign is underway, and a second prototype is planned for submission before the end of the year