Design and Validation of a Reduced Switching Components Step-Up Multilevel Inverter (RSCS-MLI)

A reduced switching components step-up multilevel inverter (RSCS-MLI) is presented in the paper. The basic circuit of the proposed MLI can produce 11 levels in the output voltage with a reduced number of switching components. The other features of the proposed circuit include a low value of voltage stresses and the inherent generation of the voltage levels pertaining to the negative half without the requirement of an H-bridge. Fundamental frequency switching technique, also known as Nearest Level Control (NLC) technique, is implemented in the proposed topology for generating the switching signals. The experimental total harmonic distortion (THD) in the output voltage comes out to be 9.4% for modulation index equal to 1. Based on different parameters, a comparative study has been shown in the paper, which makes the claim of the proposed MLI stronger. An experimental setup is prepared to carry out the hardware implementation of the proposed structure and monitor its performance under dynamic load conditions, which is also used to verify the simulation results. Power loss analysis, carried out by using PLECS software, helps us to gain insight into different losses occurring while operating the inverter. The different results are explained and analyzed in the paper.