Towards Low Latency and Resource-Efficient FPGA Implementations of the MUSIC Algorithm for Direction of Arrival Estimation

The estimation of the Direction of Arrival (DoA) is one of the most critical parameters for target recognition, identification and classification. MUltiple SIgnal Classification (MUSIC) is a powerful technique for DoA estimation. The algorithm requires complex mathematical operations like the computation of the covariance matrix for the input signals, eigenvalue decomposition and signal peak search. All these signal processing operations make real-time and resource-efficient implementation of the MUSIC algorithm on Field Programmable Gate Arrays (FPGAs) a challenge. In this paper, a novel design approach is proposed for the FPGA-implementation of the MUSIC algorithm. This approach enables a significant reduction in both FPGA resources and latency. In more detail, the proposed design enables the estimation of DoA in real-time scenarios in 2μ sec with 30% to 50% fewer resources as compared to existing techniques.The work of Pedro Reviriego was supported in part by the Architecting Intelligent Cost-effective Central Offices to enable 5G Tactile Internet (ACHILLES) through the Spanish Ministry of Economy and Competitivity under Project PID2019-104207RB-I00, in part by the Madrid Government (Comunidad de Madrid-Spain) through the Multiannual Agreement with Universidad Carlos III de Madrid (UC3M) in the line of Excellence of University Professors under Grant EPUC3M21, and in part by the Context of the V Plan Regional de Investigación Científica e Innovación Tecnológica (V PRICIT) (Regional Program of Research and Technological Innovation)