A Scalable SystemC Model of a Checkerboard Grid of Processing Cells

Ever since the introduction of embedded computers, embedded computing systems have hada great impact on our daily life and changed the way the whole society operates. Embedded computers today have gained many functionalities and massive amount of computing power. Further more, embedded computing systems can be integrated into System-on-Chip (SoC) which usually contains many processing cores and some of them capable of rendering graphics for high resolution screen. As SoCs get more and more complex, scalability becomes a series issue: it is harder and harder to fit more computing units, memories and other component in a single chip while maintaining scalable performance. In this thesis, we introduce the “Checkerboard” Grid of Processing Cells (GPC) architecture model, which is designed to be a scalable and stable platform without sacrificing scalable performance. This work simulates and evaluates the scalability of Checkerboard SystemC model with a Mandelbrot Set Visualization application – an embarrassingly parallel program that calculates and visualizes the Mandelbrot set with given parameters