Analyze and study the impacts of different packages on static and dynamic IR Drop analysis on different Infineon designs.

Dynamic voltage drop depends on the switching activity of the logic compared to static IR drop, and hence it is a vector dependent concept. In this paper we have highlighted the methodology of extraction and modeling of package along with the chip-package static IR drop as well as dynamic IR drop analysis scenarios.A proper structured approach to analyze the impact of package parasitics onto the die is presented, with an emphasis to cover different corners in which IR analysis is impacted, and how it can be implemented in the design cycle. Finally, the impact of package on chip is studied by considering the histogram plots obtained from dynamic IR numbers. Later using all the numbers & plots impact of different packages on chip is realized.Results are from acquired from industrial designs in 65nm process related to the said topics. DOI: 10.17762/ijritcc2321-8169.15055