Design and Implementation of High speed and Energy Efficient MAC using Adaptive Logic

Every digital circuit objective is to achieve MEP system i.e., minimum energy, minimum power, minimum voltage. Theseconstraints can be achieved through adaptive logic. Adaptive logic is one of the fastest and innovative logic that has been implemented in digital circuit . Adaptive logic is implemented using the combination of both Nano magnetic technology and CMOS technology . Adaptive technique works very effectively in both threshold and sub � threshold regions. Internet - of - Things (IoT) is on the threshold of a massive breakthrough. Timing-error-detection (TED)-based systems have been shown to reduce power consumption or increase yield due to reduced margins. Reducing voltage in the circuit results in slow operation that incurs more delay. Canary circuit have been designed for error detection and error correction approach. Canary circuit results in large delay. Adaptive logic have been designed with dual latch phase in each stage. A combination of XNOR gate and flip-flop around each stage is added for the verification of correct operation. The entire architecture was modelled using Verilog code with the help of XILINX ISE tool