Reliable And Power-Aware Architectures: Fundamentals And Modeling

Chip power consumption is one of the most challenging and transforming issues that the semiconductor industry has encountered in the past decade, and its sustained growth has resulted in various concerns, especially when it comes to chip reliability. It translates into thermal issues that could harm the chip. It can also determine battery life in the mobile arena. Furthermore, attempts to circumvent the power wall through techniques like near-threshold voltage computing lead to other serious reliability concerns. For example, chips become more susceptible to soft errors at lower voltages. This scene becomes even more disturbing when we add an extra variable: a hostile (or harsh) surrounding environment.This chapter discusses fundamental reliability concepts as well as techniques to deal with reliability issues and their power implications. The first part of the chapter discusses the concepts of error, fault, and failure, the resolution phases of resilient systems, and the definition and associated metrics of hard and soft errors. The second part presents two effective approaches to stress a system from resilience and power-awareness standpoints-namely fault injection and microbenchmarking. Finally, the last part of the chapter introduces basic concepts related to power-performance modeling and measurement