A high-robustness and low-capacitance clamp for on-chip electrostatic discharge (ESD) protection is developed. The low capacitance is obtained by mitigating the capacitance associated with the lightly doped n-well/p-well junction. In addition to minimizing the capacitance, the high ESD robustness is achieved by optimizing independently within the same structure a silicon-controlled rectifier and a diode for the forward and reverse conduction processes, respectively. The new clamp with an area of 50 ×10μm 2 is able to handle an ESD current in excess of 1.5 A, whereas the capacitance at zero bias is kept at 94 fF. © 1980-2012 IEEE
ESD, the discharge of electrostatically generated charges into an IC, is one of the most important r...
Robust and novel devices called High Holding, Low-Voltage-Trigger Silicon Controlled Rectifiers (HH-...
Electrostatic discharge (ESD) related failure is a major IC reliability concern and this is particul...
A high-robustness and low-capacitance clamp for on-chip electrostatic discharge (ESD) protection is ...
A high-robustness and low-capacitance clamp for on-chip electrostatic discharge (ESD) protection is ...
Abstract. An ESD protection design is proposed to solve the ESD protection challenge to the analog p...
Electrostatic discharge (ESD) protection devices fabricated in a low-voltage CMOS process for commun...
An electrostatic discharge (ESD) protection structure constructed by the stacking of multiple anode ...
This paper reports design and analysis of new low triggering voltage dual-polarity silicon-controlle...
An electrostatic discharge (ESD) protection structure constructed by the stacking of multiple anode ...
In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection c...
Robust and novel devices called High Holding, Low-Voltage-Trigger Silicon Controlled Rectifiers (HH-...
Abstract: Electrostatic discharge (ESD) protection has been a very important reliability issue in mi...
A new silicon-controlled rectifier (SCR) fabricated in a 30-V mixed-signal CDMOS (CMOS/DMOS) technol...
Abstract—An electrostatic discharge (ESD) protection design is proposed to solve the ESD protection ...
ESD, the discharge of electrostatically generated charges into an IC, is one of the most important r...
Robust and novel devices called High Holding, Low-Voltage-Trigger Silicon Controlled Rectifiers (HH-...
Electrostatic discharge (ESD) related failure is a major IC reliability concern and this is particul...
A high-robustness and low-capacitance clamp for on-chip electrostatic discharge (ESD) protection is ...
A high-robustness and low-capacitance clamp for on-chip electrostatic discharge (ESD) protection is ...
Abstract. An ESD protection design is proposed to solve the ESD protection challenge to the analog p...
Electrostatic discharge (ESD) protection devices fabricated in a low-voltage CMOS process for commun...
An electrostatic discharge (ESD) protection structure constructed by the stacking of multiple anode ...
This paper reports design and analysis of new low triggering voltage dual-polarity silicon-controlle...
An electrostatic discharge (ESD) protection structure constructed by the stacking of multiple anode ...
In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection c...
Robust and novel devices called High Holding, Low-Voltage-Trigger Silicon Controlled Rectifiers (HH-...
Abstract: Electrostatic discharge (ESD) protection has been a very important reliability issue in mi...
A new silicon-controlled rectifier (SCR) fabricated in a 30-V mixed-signal CDMOS (CMOS/DMOS) technol...
Abstract—An electrostatic discharge (ESD) protection design is proposed to solve the ESD protection ...
ESD, the discharge of electrostatically generated charges into an IC, is one of the most important r...
Robust and novel devices called High Holding, Low-Voltage-Trigger Silicon Controlled Rectifiers (HH-...
Electrostatic discharge (ESD) related failure is a major IC reliability concern and this is particul...