Two trench-gated power MOSFETs using strained SiGe channel are proposed to further reduce specific on-state resistance. The first is a multiple SiGe and Si layer structure for N-channel MOSFET. A 30nm Si0.85Ge0.15 layer and a 50nm Silicon layer are grown by RPCVD alternatively to achieve sufficient channel length which is longer than the critical thickness before the trench etch. The second method is to form the strained SiGe layer along the trench sidewall for P-channel MOSFET. A single Si0.85Ge 0.15 layer of 30nm thick is grown after the trench etch. It is expected that the channel mobility in the vertical direction will be increased by up to 40% and 60% for electrons and holes, respectively, compared to conventional silicon device with s...
As device dimensions are scaled beyond the 45nm node, new device architectures and new materials ne...
textSince metal-oxide-semiconductor (MOS) device was first reported around 1959 and utilized for int...
In this paper, we propose a fabrication process of Strained Silicon MOSFET incorporating Dielectric ...
Strain engineering such as tensile-strained silicon on silicon germanium is widely used in complemen...
With the development of modern electronics, the demand for high quality power supplies has become mo...
Results comparing strained-Si-SiGe n-channel MOSFET performance of single-and dual-surface channel d...
Strained SiGe heterostructures possess transport properties superior to Si. Their integration in the...
The semiconductor industry’s relentless effort to extract enhanced performance from MOS transistors ...
We introduce a strained-SiGe technology adopting different thicknesses of Si cap layers towards low ...
Investigations into the performance of strained silicon/silicon-germanium (Si/SiGe) n-channel metal-...
peer reviewedAs scaling of the critical transistor dimensions below 65 nm has been slowed down, the ...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
In this study, material investigations of strained Si/SiGe platforms for MOSFET applications are pre...
Biaxial tensile strained Si grown on SiGe virtual substrates will be incorporated into future genera...
Silicon Germanium (Si1-xGex) is an alloy semiconductor that has caught considerable attention of the...
As device dimensions are scaled beyond the 45nm node, new device architectures and new materials ne...
textSince metal-oxide-semiconductor (MOS) device was first reported around 1959 and utilized for int...
In this paper, we propose a fabrication process of Strained Silicon MOSFET incorporating Dielectric ...
Strain engineering such as tensile-strained silicon on silicon germanium is widely used in complemen...
With the development of modern electronics, the demand for high quality power supplies has become mo...
Results comparing strained-Si-SiGe n-channel MOSFET performance of single-and dual-surface channel d...
Strained SiGe heterostructures possess transport properties superior to Si. Their integration in the...
The semiconductor industry’s relentless effort to extract enhanced performance from MOS transistors ...
We introduce a strained-SiGe technology adopting different thicknesses of Si cap layers towards low ...
Investigations into the performance of strained silicon/silicon-germanium (Si/SiGe) n-channel metal-...
peer reviewedAs scaling of the critical transistor dimensions below 65 nm has been slowed down, the ...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
In this study, material investigations of strained Si/SiGe platforms for MOSFET applications are pre...
Biaxial tensile strained Si grown on SiGe virtual substrates will be incorporated into future genera...
Silicon Germanium (Si1-xGex) is an alloy semiconductor that has caught considerable attention of the...
As device dimensions are scaled beyond the 45nm node, new device architectures and new materials ne...
textSince metal-oxide-semiconductor (MOS) device was first reported around 1959 and utilized for int...
In this paper, we propose a fabrication process of Strained Silicon MOSFET incorporating Dielectric ...