In this paper we propose a unified architectural support that can be used flexibly for either soft-error protection or software bug detection. Our approach is based on dynamically detecting and enforcing instruction-level invariants. A hardware table is designed to keep track of run-time invariant information. During program execution, instructions access this table and compare their produced results against the stored invariants. Any violation of the predicted invariant suggests a potential abnormal behavior, which could be a result of a soft error or a latent software bug. In case of a soft error, monitoring invariant violations provides opportunistic soft-error protection to multiple structures in processor pipelines. Our experimental re...
Soft errors are faults which are not caused by defective hardware, rather they are induced due to no...
Hardware errors are on the rise with reducing chip sizes, and power constraints have necessitated th...
Abstract—As silicon technology continues to scale down and validation expenses continue to increase,...
It is a great challenge to build reliable computer systems with unreliable hardware and buggy softwa...
This paper makes two contributions to architectural support for software debugging. First, it propos...
This paper makes two contributions to architectural support for software debugging. First, it propos...
In this paper is described a software technique allowing the detection of soft errors occurring in p...
As Moore's law has been continuously improving the microprocessor's speed, performance is no longer ...
Embedded systems are increasingly deployed in harsh environments that their components were not nece...
Dynamic tools for software bug detection such as Purify are commonly used because they leverage run-...
The paper describes a systematic approach for automatically introducing data and code redundancy int...
Soft error caused by single event upset has been a severe challenge to aerospace-based computing. Si...
Successive generations of processors use smaller transistors in the quest to make more powerful comp...
Software-based fault tolerance techniques are a low-cost way to protect processors against soft erro...
Software defects, commonly known as bugs, present a serious challenge for system reliability and dep...
Soft errors are faults which are not caused by defective hardware, rather they are induced due to no...
Hardware errors are on the rise with reducing chip sizes, and power constraints have necessitated th...
Abstract—As silicon technology continues to scale down and validation expenses continue to increase,...
It is a great challenge to build reliable computer systems with unreliable hardware and buggy softwa...
This paper makes two contributions to architectural support for software debugging. First, it propos...
This paper makes two contributions to architectural support for software debugging. First, it propos...
In this paper is described a software technique allowing the detection of soft errors occurring in p...
As Moore's law has been continuously improving the microprocessor's speed, performance is no longer ...
Embedded systems are increasingly deployed in harsh environments that their components were not nece...
Dynamic tools for software bug detection such as Purify are commonly used because they leverage run-...
The paper describes a systematic approach for automatically introducing data and code redundancy int...
Soft error caused by single event upset has been a severe challenge to aerospace-based computing. Si...
Successive generations of processors use smaller transistors in the quest to make more powerful comp...
Software-based fault tolerance techniques are a low-cost way to protect processors against soft erro...
Software defects, commonly known as bugs, present a serious challenge for system reliability and dep...
Soft errors are faults which are not caused by defective hardware, rather they are induced due to no...
Hardware errors are on the rise with reducing chip sizes, and power constraints have necessitated th...
Abstract—As silicon technology continues to scale down and validation expenses continue to increase,...