Hotspot Preventing Adaptive Routing Algorithm For Networks-On-Chip

Due to the constraints on VLSI scaling and reliability of chips, future processor and system-on-chip designs must incorporate on-chip communication networks. Use of on-chip networks instead of global wiring also facilitate modular design and hence help to reduce time-to-market pressure. Temperature variations and formation of hotspots in the chip impact chip reliability and performance greatly. In this paper we propose a Hotspot Preventing Adaptive Routing (HPAR) algorithm that prevents the formation of hotspots on chips while keeping the network packet delivery delay low. Thus the routing algorithm helps reduce cooling costs of the chips and also prevents chip failures due to overheating. Our algorithm adapts to the network traffic load and performs much better than the Shortest Hop Routing (SHR) algorithm in terms of reducing hotspots