A very simple circuit for a 3-bits discrete pure linear analog preprocessing folding ADC is presented. The device is based on the folding idea: the DAC, the summing node and the amplifier, fundamental elements of the classical architecture, are eliminated and replaced with an analogical signal preprocessing parallel structure named “channels”. All channels are connected as a cascade and only three transistors constitute each one. The circuit has been widely analyzed by simulation and its simplicity guarantees easiness of realization, reduction of power consumption and reduction of total conversion time, making it close to the ADC flash. A first discrete circuit it has been realized and teste
The necessity of full integrated electronics readout for the next ILC ECAL presents many challenges ...
A 8-bit 150MHz low-power CMOS folding and interpolating analog-to-digital converter with a fully-fol...
This paper presents an 8-bit low power cascaded folding and interpolating analog-to-digital converte...
A very simple circuit for a 3-bits discrete pure linear analog preprocessing folding ADC is present...
A simplified architecture of subranging pure linear folding ADC is proposed. The device is based on...
A very simple linear folding architecture for subranging ADC is presented. The preprocessing analog...
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
The present invention relates, in general, to analog-to-digital conversion and, in particular, to an...
A simplified 3 –bits discrete pure linear analog preprocessing folding ADC architectur
This paper proposes a new structure of a high speed analog-to-digital converter (ADC) with high reso...
Abstract — Analog to Digital converter plays an important role as the interface between analog and d...
PatentAn analog-to-digital converter in which an analog input signal is folded by a plurality of fol...
The dynamical characteristics simulation results of the analog signal folding circuit for comparator...
A 6-bit 250MHz low-power CMOS fully-folding analog-to-digital converter is designed in a 0.5??m stan...
This paper presents a novel encoding scheme based on the residue number systems for folding ADC to e...
The necessity of full integrated electronics readout for the next ILC ECAL presents many challenges ...
A 8-bit 150MHz low-power CMOS folding and interpolating analog-to-digital converter with a fully-fol...
This paper presents an 8-bit low power cascaded folding and interpolating analog-to-digital converte...
A very simple circuit for a 3-bits discrete pure linear analog preprocessing folding ADC is present...
A simplified architecture of subranging pure linear folding ADC is proposed. The device is based on...
A very simple linear folding architecture for subranging ADC is presented. The preprocessing analog...
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
The present invention relates, in general, to analog-to-digital conversion and, in particular, to an...
A simplified 3 –bits discrete pure linear analog preprocessing folding ADC architectur
This paper proposes a new structure of a high speed analog-to-digital converter (ADC) with high reso...
Abstract — Analog to Digital converter plays an important role as the interface between analog and d...
PatentAn analog-to-digital converter in which an analog input signal is folded by a plurality of fol...
The dynamical characteristics simulation results of the analog signal folding circuit for comparator...
A 6-bit 250MHz low-power CMOS fully-folding analog-to-digital converter is designed in a 0.5??m stan...
This paper presents a novel encoding scheme based on the residue number systems for folding ADC to e...
The necessity of full integrated electronics readout for the next ILC ECAL presents many challenges ...
A 8-bit 150MHz low-power CMOS folding and interpolating analog-to-digital converter with a fully-fol...
This paper presents an 8-bit low power cascaded folding and interpolating analog-to-digital converte...