Feedback bridging faults may give rise to oscillations within integrated circuits. This work mainly investigates the propagation of oscillations, a behavior that may have a relevant impact on the fault detection.We propose both a logic-level model of the faulty circuit and two techniques aiming to the generation of high-quality test sequences
Automatic Test Pattern Generation (ATPG) is an important task to ensure that a chip functions correc...
An efficient automatic test pattern generator for I$\sb{DDQ}$ current testing of CMOS digital circui...
International audienceThe topical problem of effective verification of digital circuits of different...
Download Citation Email Print Request Permissions Feedback bridging faults may giv...
We study the behavior of feedback bridging faults with non-zero bridge resistance. We demonstrate th...
We describe a system for generating accurate tests for bridge faults (with or without feedback) in C...
Abstract — In this paper we study the testability of circuits derived from Binary Decision Diagrams ...
Currently, Very Large Scale Integrated (VLSI) circuits and the resulting digital systems are widely ...
In this paper we give an overview of recent work in extraction, simulation, and IDDQ test generation...
The growing dispersion of ICs' parameters poses relevant uncertainties on gate output conductances...
Abstract: Inductance of on-chip interconnects gives rise to signal overshoots and undershoots that c...
The growing dispersion of parameters in CMOS ICs poses relevant uncertainties on gate output conduct...
An ATPG for resistive bridging faults is proposed that combines the advantages of section-based gene...
This paper analyzes the detectability of resistive bridging faults in CMOS (micro)-pipelined circuit...
A novel algorithm for diagnosing all two-line single bridging faults in combinational circuits is pr...
Automatic Test Pattern Generation (ATPG) is an important task to ensure that a chip functions correc...
An efficient automatic test pattern generator for I$\sb{DDQ}$ current testing of CMOS digital circui...
International audienceThe topical problem of effective verification of digital circuits of different...
Download Citation Email Print Request Permissions Feedback bridging faults may giv...
We study the behavior of feedback bridging faults with non-zero bridge resistance. We demonstrate th...
We describe a system for generating accurate tests for bridge faults (with or without feedback) in C...
Abstract — In this paper we study the testability of circuits derived from Binary Decision Diagrams ...
Currently, Very Large Scale Integrated (VLSI) circuits and the resulting digital systems are widely ...
In this paper we give an overview of recent work in extraction, simulation, and IDDQ test generation...
The growing dispersion of ICs' parameters poses relevant uncertainties on gate output conductances...
Abstract: Inductance of on-chip interconnects gives rise to signal overshoots and undershoots that c...
The growing dispersion of parameters in CMOS ICs poses relevant uncertainties on gate output conduct...
An ATPG for resistive bridging faults is proposed that combines the advantages of section-based gene...
This paper analyzes the detectability of resistive bridging faults in CMOS (micro)-pipelined circuit...
A novel algorithm for diagnosing all two-line single bridging faults in combinational circuits is pr...
Automatic Test Pattern Generation (ATPG) is an important task to ensure that a chip functions correc...
An efficient automatic test pattern generator for I$\sb{DDQ}$ current testing of CMOS digital circui...
International audienceThe topical problem of effective verification of digital circuits of different...