A 10 MHz relaxation oscillator with a novel jitter suppression comparator autozeroing technique

This paper presents a fully-integrated CMOS RC relaxation oscillator using an innovative Jitter Suppression Comparator Autozeroing technique. The oscillator, designed with a 0.18 um CMOS process from UMC, has been sized to provide a 10 MHz clock signal for low power, low cost integrated circuits. Simulations show that the proposed approach is able to provide an effective reduction of the accumulated jitter for long observation time (up to 10k cycles). The output frequency variation is 19.48 ppm/°C over a temperature range from - 40°C to 80 °C and 0.12 % for a supply voltage variation from 1.7 V to 1.9 V. The current consumption of the oscillator is 79 uA at 1.8 V. The proposed circuit shows a Figure-of-Merit of 144 dBc/Hz