Demonstrating a SAR Satellite Onboard Processing Chain

The EO-ALERT project, being implemented by a European consortium in the frame of the European Union’s Horizon 2020 programme, has developed, built, and tested a prototype demonstrator chain comprising onboard raw EO data (SAR and optical) Level 1 processing, Level 2 image processing and transfer of final EO alert products to the end user. The goal of the project is to demonstrate the feasibility of the concept aiming at overall latencies below 5 minutes even down to 1 minute. The task of DLR within the project was to implement a low latency SAR onboard Level 1 and Level 2 processing chain. SAR processing is well known for its high demand for computational resources. The targeted latencies together with low power and low mass constraints require the use of Field-Programmable Gate Array (FPGA) technology. Multi-Processor System on a Chip (MPSoC) devices were chosen for all onboard data chain developments. SAR image formation (IF) and SAR image processing (IP) are integrated in a single bitstream file and loaded into a single MPSoC device. The the paper provides an overview of the demonstrator chain built in the project, the SAR processing chain implementation and the achieved test result