International audienceThis work presents a detection and calibration circuit for current sources static mismatch introduced by the process of fabrication. The current is corrected through backgate body bias voltage control, which has the benefit of reduced additional parasitic elements, compared to more classic amplitude calibration or sort-and-map solutions. The main application are high speed and high resolution current steering Digital to Analog Converters (DAC). The calibration circuit is applied on a 2 timeinterleaved (TI) DAC, with 12 bits of resolution and sampled at a frequency of 16 GHz. Its main requirement is to be able to generate signals up to the Nyquist Band (8 GHz) with Spurious Free Dynamic Range (SFDR) of at least 70 dBFS....
A 14-bit 200MS/s current-steering DAC with a novel digital calibration technique called dynamic-mism...
The demand for high-speed communication systems has dramatically increased during the last decades. ...
Transistor random mismatch continuously poses challenges for analog/RF circuit design forachieving h...
The accuracy of a Digital to Analog Converter (DAC) is crucial for its operation. Due to production ...
Abstract — This paper presents a new foreground DAC calibration method that is insensitive to temper...
This paper presents a 14 bit 200 MS/s current-steering DAC with a novel digital calibration techniqu...
This paper presents a 14 bit 200 MS/s current-steering DAC with a novel digital calibration techniqu...
This research work proposes new concepts of flexibility and self-correction for currentsteering digi...
Abstract—Large-area current source arrays are widely used in current-steering digital-to-analog conv...
This paper classifies correction methods for current-steering Digital-to-Analog Converters (DACs), w...
This paper classifies correction methods for current-steering Digital-to-Analog Converters (DACs), w...
This paper presents a new start-up calibration method and algorithm for current-steering D/A convert...
This chapter presents the implementation and measurement results of two DAC test-chip implementation...
This paper describes a calibration-free/dynamic-element-matching-free 8-bit 2.4-GS/s single-core cur...
A 14-bit 200MS/s current-steering DAC with a novel digital calibration technique called dynamic-mism...
The demand for high-speed communication systems has dramatically increased during the last decades. ...
Transistor random mismatch continuously poses challenges for analog/RF circuit design forachieving h...
The accuracy of a Digital to Analog Converter (DAC) is crucial for its operation. Due to production ...
Abstract — This paper presents a new foreground DAC calibration method that is insensitive to temper...
This paper presents a 14 bit 200 MS/s current-steering DAC with a novel digital calibration techniqu...
This paper presents a 14 bit 200 MS/s current-steering DAC with a novel digital calibration techniqu...
This research work proposes new concepts of flexibility and self-correction for currentsteering digi...
Abstract—Large-area current source arrays are widely used in current-steering digital-to-analog conv...
This paper classifies correction methods for current-steering Digital-to-Analog Converters (DACs), w...
This paper classifies correction methods for current-steering Digital-to-Analog Converters (DACs), w...
This paper presents a new start-up calibration method and algorithm for current-steering D/A convert...
This chapter presents the implementation and measurement results of two DAC test-chip implementation...
This paper describes a calibration-free/dynamic-element-matching-free 8-bit 2.4-GS/s single-core cur...
A 14-bit 200MS/s current-steering DAC with a novel digital calibration technique called dynamic-mism...
The demand for high-speed communication systems has dramatically increased during the last decades. ...
Transistor random mismatch continuously poses challenges for analog/RF circuit design forachieving h...