Inverters With Strained Si Nanowire Complementary Tunnel Field-Effect Transistors
- Knoll L
- Zhao Q-J
- Nichau A
- Trellenkamp S
- Richter S
- Sch\ue4fer A
- Esseni D
- Selmi L
- Bourdelle K K
- Mantl S
DOIAbstract
Inverters based on uniaxially tensile strained Si (sSi) nanowire (NW) tunneling field-effect transistors (TFETs) are fabricated. Tilted dopant implantation using the gate as a shadow mask allows self-aligned formation of p-i-n TFETs. The steep junctions formed by dopant segregation at low temperatures improve the band-to-band tunneling, resulting in higher oncurrents of n- and p-TFETs of >10 \u3bcA/\u3bcm at VDS = 0.5 V. The subthreshold slope for n-channel TFETs reaches a minimum value of 30 mV/dec, and is <60 mV/dec over one order of magnitude of drain current. The first sSi NW complementary TFET inverters show sharp transitions and fairly high static gain even at very low VDD = 0.2 V. The first transient response analysis of the inverter...
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