In this paper, the energy-delay tradeoff that can be realized between energy and delay for MCML gates is explored using the energy-efficient curve. Two metric, namely, the energy-delay gain and the delay-energy gain are employed to quantify it. Moreover, a methodology is introduced for the minimization of the energy-delay product. Experiments were performed in 130nm and 45nm technologies
This paper presents the three-fold energy, rate and delay tradeoff in mobile multimedia fading chann...
The present work is to evaluate energy consumption in wireless sensor networks for multi-layer mediu...
In this paper we analyze, design and compare six significant topologies of one-bit full adders in te...
In this paper, the energy-delay tradeoff that can be realized between energy and delay for MCML gate...
This paper presents a novel delay model for MCML circuits valid in all the regions of operation of t...
This paper relates the potential energy savings to the energy profile of a circuit. These savings ar...
In this paper, general metrics of the energy-delay (E-D) tradeoff in digital VLSI circuits are discu...
In this paper we introduce an energy-delay efficiency metric that captures any trade-off between the...
This paper proposes a system-level design methodology for the efficient exploration of the memory ar...
Minimizing a quality metric for an MCML gate, such as power-delay product or energy-delay product, r...
Abstract — We consider a wireless sensor network where the nodes have limited energy. We first analy...
In this paper a design strategy for MUX, XOR and D-latch Source-Coupled Logic (SCL) gates is propose...
A new variation-aware energy-delay optimization method is proposed for device-circuit co-design in n...
A new variation-aware energy-delay optimization method is proposed for device-circuit co-design in n...
Abstract—Multiple beyond-CMOS information processing de-vices are presently under active research an...
This paper presents the three-fold energy, rate and delay tradeoff in mobile multimedia fading chann...
The present work is to evaluate energy consumption in wireless sensor networks for multi-layer mediu...
In this paper we analyze, design and compare six significant topologies of one-bit full adders in te...
In this paper, the energy-delay tradeoff that can be realized between energy and delay for MCML gate...
This paper presents a novel delay model for MCML circuits valid in all the regions of operation of t...
This paper relates the potential energy savings to the energy profile of a circuit. These savings ar...
In this paper, general metrics of the energy-delay (E-D) tradeoff in digital VLSI circuits are discu...
In this paper we introduce an energy-delay efficiency metric that captures any trade-off between the...
This paper proposes a system-level design methodology for the efficient exploration of the memory ar...
Minimizing a quality metric for an MCML gate, such as power-delay product or energy-delay product, r...
Abstract — We consider a wireless sensor network where the nodes have limited energy. We first analy...
In this paper a design strategy for MUX, XOR and D-latch Source-Coupled Logic (SCL) gates is propose...
A new variation-aware energy-delay optimization method is proposed for device-circuit co-design in n...
A new variation-aware energy-delay optimization method is proposed for device-circuit co-design in n...
Abstract—Multiple beyond-CMOS information processing de-vices are presently under active research an...
This paper presents the three-fold energy, rate and delay tradeoff in mobile multimedia fading chann...
The present work is to evaluate energy consumption in wireless sensor networks for multi-layer mediu...
In this paper we analyze, design and compare six significant topologies of one-bit full adders in te...