We present a test chip for the direct measure of the effects of inter/intra-chip process variations on the performance of CMOS circuits. The test structure is a ring oscillator made of modified CMOS inverters that may exhibit two slightly different delays depending on the value of a digital control signal. The incremental delay of each cell is measured from the oscillation periods obtained with different configurations of the control bits. Results are reported for different lots of a 0.18μm process
In this proposed some back end and front end process monitoring sensors are made, which will give th...
Project (M.S., Electrical and Electronic Engineering)--California State University, Sacramento, 2014...
This paper presents a time-domain method for estimating the jitter in ring oscillators that is due t...
We present a test chip for the direct measure of the effects of inter/intra-chip process variations ...
We report the design and characterization of a circuit technique to measure the on-chip delay of a...
We report a circuit technique to measure the on-chip delay of an individual logic gate (both inverti...
Electronic monitoring utilizing process-specific Ring Oscillators (RO) is explored as a means of ide...
Abstract:- In previous work, we presented a test structure based on ring oscillator (RO) to measure ...
Motivation -- Thesis goal -- Organization of thesis -- Process variations in CMOS integrated circuit...
Increased variation in CMOS processes due to scaling results in greater reliance on accurate variati...
We present a novel low cost scheme for the on-die measurement of either clock jitter, or process par...
A description is given of a test structure consisting of a combination of a ring oscillator and an i...
mance has become more sensitive to manufacturing and environ-mental variations. Hence, there is a ne...
Abstract- New characterizing system for within-die delay variations of individual standard cells is ...
Abstract—Increased variation in CMOS processes due to scaling results in greater reliance on accurat...
In this proposed some back end and front end process monitoring sensors are made, which will give th...
Project (M.S., Electrical and Electronic Engineering)--California State University, Sacramento, 2014...
This paper presents a time-domain method for estimating the jitter in ring oscillators that is due t...
We present a test chip for the direct measure of the effects of inter/intra-chip process variations ...
We report the design and characterization of a circuit technique to measure the on-chip delay of a...
We report a circuit technique to measure the on-chip delay of an individual logic gate (both inverti...
Electronic monitoring utilizing process-specific Ring Oscillators (RO) is explored as a means of ide...
Abstract:- In previous work, we presented a test structure based on ring oscillator (RO) to measure ...
Motivation -- Thesis goal -- Organization of thesis -- Process variations in CMOS integrated circuit...
Increased variation in CMOS processes due to scaling results in greater reliance on accurate variati...
We present a novel low cost scheme for the on-die measurement of either clock jitter, or process par...
A description is given of a test structure consisting of a combination of a ring oscillator and an i...
mance has become more sensitive to manufacturing and environ-mental variations. Hence, there is a ne...
Abstract- New characterizing system for within-die delay variations of individual standard cells is ...
Abstract—Increased variation in CMOS processes due to scaling results in greater reliance on accurat...
In this proposed some back end and front end process monitoring sensors are made, which will give th...
Project (M.S., Electrical and Electronic Engineering)--California State University, Sacramento, 2014...
This paper presents a time-domain method for estimating the jitter in ring oscillators that is due t...