With the scale down of transistor sizes and higher frequencies with low power modes in modern architectures, the chip components become more susceptible to transient errors. Concurrently, multicore machines are replacing traditional single-core machines in most application domains. Thread Vulnerability Factor (TVF) is a metric to evaluate relative soft error vulnerability of multithreaded applications running on multicore architectures. It makes possible vulnerability analysis of parallel programs by providing comparisons between them. In this work, we design a simulation-based fault-injection framework to evaluate soft error vulnerability of parallel applications and perform a validation study to evaluate parallel program vulnerability. Th...
Dependable computing on unreliable substrates is the next challenge the computing community needs to...
Abstract—Reliability is an important design constraint in modern microprocessors, and one of the fun...
As the capacity of cache increases dramatically with new processors, soft errors originating in cach...
Continuously reducing transistor sizes and aggressive low power operating modes employed by modern a...
Continuously reducing transistor sizes and aggressive low power operating modes employed by modern a...
Modern architectures become more susceptible to transient errors with the scale down of circuits. Th...
Increasing chip power densities allied to the continuous technology shrink is making emerging multip...
Multicore processors are becoming more and more attractive in embedded and safety-critical domains b...
International audienceFault injection is a well known method to test the robustness and security vul...
The adoption of Microprocessors is increasingly diversifying to several embedded and mo- bile device...
Abstract—Soft Errors have emerged as a key challenge to microprocessor design. Traditional soft erro...
Current and future multicore architectures can significantly accelerate the performance of test auto...
Fault injection (FI) is an experimental technique to assess the robustness of software by deliberate...
International audienceSimulation-based fault injection is commonly used to estimate system vulnerabi...
Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Com...
Dependable computing on unreliable substrates is the next challenge the computing community needs to...
Abstract—Reliability is an important design constraint in modern microprocessors, and one of the fun...
As the capacity of cache increases dramatically with new processors, soft errors originating in cach...
Continuously reducing transistor sizes and aggressive low power operating modes employed by modern a...
Continuously reducing transistor sizes and aggressive low power operating modes employed by modern a...
Modern architectures become more susceptible to transient errors with the scale down of circuits. Th...
Increasing chip power densities allied to the continuous technology shrink is making emerging multip...
Multicore processors are becoming more and more attractive in embedded and safety-critical domains b...
International audienceFault injection is a well known method to test the robustness and security vul...
The adoption of Microprocessors is increasingly diversifying to several embedded and mo- bile device...
Abstract—Soft Errors have emerged as a key challenge to microprocessor design. Traditional soft erro...
Current and future multicore architectures can significantly accelerate the performance of test auto...
Fault injection (FI) is an experimental technique to assess the robustness of software by deliberate...
International audienceSimulation-based fault injection is commonly used to estimate system vulnerabi...
Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Com...
Dependable computing on unreliable substrates is the next challenge the computing community needs to...
Abstract—Reliability is an important design constraint in modern microprocessors, and one of the fun...
As the capacity of cache increases dramatically with new processors, soft errors originating in cach...