Implementation Of Bluetooth Baseband Controller Based On FPGA Design

Implementation of Bluetooth baseband controller is a study of packet processing and data restoration process. Before the transferring of data, the message information is required to be processed to fulfill the standard Bluetooth packet structure for addressing, error checking and security purposes. The objective of this project is to design a Bluetooth baseband controller that is able to perform packet processing in transmit path and data restoration process in receive path. Packet processing is performed on 32 bits message information data to process it into 270 bits packet data, while data restoration process is performed on that 270 bits packet data to retrieve back the desired original 32 bits message information. The error checking processes are carried out in the middle of data restoration process in receive path. Since the data path of baseband controller is bidirectional, the data restoration process is the reversal process of packet processing. The implementation of Bluetooth baseband controller particularly concerned on the installation of data path process. Therefore, the overall structure of data path is depicted, with every single detail of explanation. Data path is composed of different blocks, such as Header Error Check (HEC) block, Cyclic Redundancy Check (CRC) block, Whitening block, Forward Error Check (FEC) block and Access Code generator and correlator block. Each block possesses different role and function in packet processing and data restoration process. Even some blocks are proposed with the application of Linear-Feedback Shift Register (LFSR), with specific generator polynomial formula. This research implements the Bluetooth baseband controller based on Field- Programmable Gate Array (FPGA) design. Verilog Hardware Description Language (VHDL) is used in the designation