Low-area and accurate inner product and digital filters based on stochastic computing

The inner product is a key operation in various applications, such as signal processing and pattern recognition. Research has shown that this function, when implemented in stochastic computing (SC) domain, can result in significant reduction in area cost and power consumption compared to its equivalent counterpart in the conventional binary-encoded (BE) deterministic computing. However, existing designs of SC inner product are disadvantaged due to high BE-SC conversion circuits, hence high overall area cost. They also suffer from correlation-induced errors that affect their accuracy performance. In this work, we propose a novel inner product design method for the SC domain that has high accuracy, low area cost, and most importantly, the circuit is correlation-insensitive. Experimental results show that the proposed design on average reduces 85.7% of hardware footprint when compared to its equivalent BE counterpart. We show that it outperforms current state-of-the-art SC designs in terms of area savings, both in computation and conversion costs. Furthermore, it achieves better (or comparable) accuracy performance compared to existing works, especially in designs having large number of inputs with low stochastic number lengths. Moreover, SC FIR filter based on the proposed design method outperforms state-of-the-art SC filters in terms of area and accuracy