National audienceThe constant increase in the integration level of microelectronics technologies makes possible to manufacture more complex devices, including parts or blocks of heterogeneous nature. However, because of the difficulties of access to the blocks of a system, the problems of test become increasingly important, generating extremely high costs. This work addresses this problem by using a statistical modelling of the performances of the analogue blocks for the optimization of the functional test. The method suggested is based on the evaluation of test metrics, in particular the defect level like criterion of elimination of the performances to be tested. This makes possible during the production test to classify the functional and...
The growing complexity of modern chips poses challenging test problems due to the requirement for sp...
L'expansion du marché des semi-conducteurs dans tous les secteurs d'activité résulte de la capacité ...
This paper describesa new CAD algorithm which performsautomatic test pattern generation (ATPG) for a...
National audienceThe constant increase in the integration level of microelectronics technologies mak...
La part dû au test dans le coût de conception et de fabrication des circuits intégrés ne cesse de cr...
The share of test in the cost of design and manufacture of integrated circuits continues to grow, he...
International audienceIn this paper, we address the problem of functional test compaction of analogu...
International audienceIn this paper, we address the problem of functional test compaction of analogu...
International audienceThe trend nowadays is to integrate more and more functionalities into a single...
This thesis addresses the issue of mixed-signal board test in maintenance stage. Numerous test metho...
The role of nano-electronic systems is rapidly expanding in every facet of modern life. Testing the ...
Process variations and physical defects can degrade the performance of a circuit, or even drasticall...
Functional tests are developed during design verification to ensure the correctness of design. They ...
International audienceThe accepted approach in industry today to ensure out-going quality in high-vo...
The growing complexity of modern chips poses challenging test problems due to the requirement for sp...
L'expansion du marché des semi-conducteurs dans tous les secteurs d'activité résulte de la capacité ...
This paper describesa new CAD algorithm which performsautomatic test pattern generation (ATPG) for a...
National audienceThe constant increase in the integration level of microelectronics technologies mak...
La part dû au test dans le coût de conception et de fabrication des circuits intégrés ne cesse de cr...
The share of test in the cost of design and manufacture of integrated circuits continues to grow, he...
International audienceIn this paper, we address the problem of functional test compaction of analogu...
International audienceIn this paper, we address the problem of functional test compaction of analogu...
International audienceThe trend nowadays is to integrate more and more functionalities into a single...
This thesis addresses the issue of mixed-signal board test in maintenance stage. Numerous test metho...
The role of nano-electronic systems is rapidly expanding in every facet of modern life. Testing the ...
Process variations and physical defects can degrade the performance of a circuit, or even drasticall...
Functional tests are developed during design verification to ensure the correctness of design. They ...
International audienceThe accepted approach in industry today to ensure out-going quality in high-vo...
The growing complexity of modern chips poses challenging test problems due to the requirement for sp...
L'expansion du marché des semi-conducteurs dans tous les secteurs d'activité résulte de la capacité ...
This paper describesa new CAD algorithm which performsautomatic test pattern generation (ATPG) for a...