Clocking scheme selection for circuits made up of a controller and a datapath

Various optimizations and trade-offs have been implemented in synthesis systems. However, the clocking scheme selection was generally not considered. Several schemes are presented to address the different types of circuits made up of a controller and a datapath. The selection of one of these schemes, according to the characteristics of the two blocks, is discussed and a practical example demonstrates the impact that this selection has on the final circuit characteristics