Particle accelerators are an important tool in modern particle physics. Accelerators can be used in different collision experiments to gain deeper knowledge about the behaviour of elementary particles. Operating such accelerators demands a wide range of precise data processing systems. One of the tasks in a collision experiment is the target rate regulation, responsible for regulating the particle rate hitting a fixed target. At the Cooler Synchrotron in Jülich the current device responsible for this is the so-called "Schneiderbox", an analogue counting and regulating device. The task of this bachelor thesis is to replace the analogue "Schneiderbox" with a Field Programmable Gate Array (FPGA). Using Hardware Description Language (HDL), the ...
The measured bending field of the CERN Proton Synchrotron (PS) is received in real-time by the longi...
In recent years, the technological node used to implement FPGA devices has led to very high performa...
In this chapter, we describe the design of a field programmable gate array (FPGA) board capable of a...
Particle accelerators are an important tool in modern particle physics. Accelerators can be used in ...
In the ATLAS experiment now being finished at CERN in Geneva, bunches ofprotons will collide at a ra...
The development of a new frequency program in the Proton Synchrotron (PS) is a project that links ex...
In this thesis, the feasibility of an FPGA to host a system for generating and distributing clocks a...
This thesis presents the design and implementation of the timing master device for the SNS (Spallati...
Particle accelerators require that the orbit of the charged particles in the vacuum chamber is contr...
In the framework of the LHC project and the modifications of the SPS as its injector, I present the ...
In this chapter we describe the design of a Field Programmable Gate Array (FPGA) board capable of ac...
This thesis describes the development of a software module for the control of devices in the CERN pa...
none5siIn recent years, the technological node used to implement FPGA devices has led to very high p...
The front-end readout electronics of the Compact Muon Solenoid (CMS) Hadron Calorimeter(HCAL) detect...
The article presents a completed project of an experimental control system in the energy sector. An ...
The measured bending field of the CERN Proton Synchrotron (PS) is received in real-time by the longi...
In recent years, the technological node used to implement FPGA devices has led to very high performa...
In this chapter, we describe the design of a field programmable gate array (FPGA) board capable of a...
Particle accelerators are an important tool in modern particle physics. Accelerators can be used in ...
In the ATLAS experiment now being finished at CERN in Geneva, bunches ofprotons will collide at a ra...
The development of a new frequency program in the Proton Synchrotron (PS) is a project that links ex...
In this thesis, the feasibility of an FPGA to host a system for generating and distributing clocks a...
This thesis presents the design and implementation of the timing master device for the SNS (Spallati...
Particle accelerators require that the orbit of the charged particles in the vacuum chamber is contr...
In the framework of the LHC project and the modifications of the SPS as its injector, I present the ...
In this chapter we describe the design of a Field Programmable Gate Array (FPGA) board capable of ac...
This thesis describes the development of a software module for the control of devices in the CERN pa...
none5siIn recent years, the technological node used to implement FPGA devices has led to very high p...
The front-end readout electronics of the Compact Muon Solenoid (CMS) Hadron Calorimeter(HCAL) detect...
The article presents a completed project of an experimental control system in the energy sector. An ...
The measured bending field of the CERN Proton Synchrotron (PS) is received in real-time by the longi...
In recent years, the technological node used to implement FPGA devices has led to very high performa...
In this chapter, we describe the design of a field programmable gate array (FPGA) board capable of a...