Predicting the Reliability of Electronic Subsystems and Commercial Of-the-Shelf Microprocessors on Low-Cost Small Satellites.

This thesis presents an investigation into methods for predicting and improving the reliability of electronic subsystems on low cost small satellites [LCSS]. Current methods for predicting the reliability of electronic systems were identified and the feasibility of these methods for predicting the reliability of electronic systems on LCSS were analysed. Trends in satellite failures and satellite design methodologies were studied. It was identified that, highly capable, LCSS have became possible due to the existence of advanced commercial-off-the-shelf (COTS) very large scale integrated circuits (VLSI) components. Typically, a large number of these components are employed on these satellites and the effect of space radiation on these components is a significant source of risk to their reliability. This research program therefore concentrated on addressing the effects of space radiation on the reliability of COTS VLSI components. In particular, traditional methods for predicting the rate and effects of radiation induced spontaneous logic state changes (Single Event Upsets (SEUs)) in satellite on-board microprocessors were critically examined. Problems associated with these methods were identified, and two new models to enable more accurate predictions were proposed, developed and tested. One of the models, a duty cycle prediction model, enables a better prediction of the "observable SEU induced error rate" in satellite microprocessor systems; and the other model, a SEU simulation model, enables the nature of SEU induced errors observed at microprocessor system level to be studied. The practical applications of both models were demonstrated by analysing a real satellite application system. These models will be particularly useful to engineers in the selection and application of reliable COTS microprocessors for satellite onboard computer intensive tasks without jeopardising reliability