The implementation of a portable software platform.

Traditionally, languages were created and intended for sequential machines and were, naturally, sequential languages. All that was required to maintain portability between machines were full specification compilers. These languages have not adopted well to the parallel domain since they are poor at expressing extractable concurrency. Portability is obviously as important for parallel computers - but the proliferation of ad hoc languages for parallel computers indicates that portability is not always the prime consideration of the language developer, as it should be, but that the support for a particularly specific un-general-purpose parallel computer is. A Portable Software Platform (PSP) is an intermediate level for compilers for parallel and scalar machines; the particular PSP discussed in this thesis, F-code, is a PSP for imperative, computational programming languages. As an intermediate level, the PSP must be general enough to represent all high-level programming problems, without discarding explicit, known concurrency; the PSP must be able to infer what other parallelism exists; and it must also be general enough to support all general-purpose parallel machines. The underlying bases of computational programming languages for parallel computers are data-parallelism and functional concurrency. Data-parallelism should therefore be represented in a PSP in the most descriptively simple, and hence most manipulable, way; and also, data- parallel operations are evaluated lazily - which means that only those elemental computations which have any bearing on the result of a computation are done. As a very general representation medium for computation, a PSP must also be architecture- neutral; PSP programs must be compiled efficiently to all general purpose parallel machines. A specific, machine-dependent, implementation must be inferred from an architecture-neutral PSP program, making it match specific aspects - memory and arithmetic pipelining, data- partitioning, VLIW execution - of a parallel or scalar hardware platform. Descriptive simplicity means that F-code is very suitable for data-parallel optimization: a PSP can equally be thought of as a tool for data-parallel optimization. Architecture-specific aspects are deferred to the very last stages of the compilation process of a PSP. The particular implementation of an F-code compiler given in this thesis is arranged in a number of main stages: the front-end is architecture-neutral; the code generator is generalized for the class of RISC processors; and only the very last stage of the compiler (the targetter) requires any specific details of a particular RISC processor. Thus, not only is a PSP architecture-neutral, but the process of compiling PSP programs maintains architecture-neutrality to some degree as late on into the compilation as possible