HCache: A Hybrid cache management scheme with Flash and next generation NVRAM

We propose a dynamic cache control mechanism HCache for a hybrid storage device consisting of next generation non-volatile memory (NVM) like STT-MRAM/PCRAM and conventional Flash. HCache works by distributing the scarce NVM capacity among multiple applications to meet their QoS requirements. The dynamic adaptation of the cache size is based on the access pattern and cache demands of the application. This is tracked through a hit rate histogram to a simple chain of virtual LRU queue. We show that our method can achieve 14% - 46% improvement in latency compared to popular control mechanisms available in the literature. It can also lead to reduced number of QoS violations compared particularly to a PID control mechanism commonly used in many of the recent and some earlier works. © 2012 DSI