Add to ORKGSheet resistance (Rs) reductions are presented for antimony and arsenic doped layers produced in strained-Si. Results show a modest Rs reduction for arsenic layers, a result of a strain-induced mobility enhancement, whereas for Sb, a superior lowering is observed from improvements in both mobility and activation. Tensile strain is shown to enhance the activation of dopant Sb whilst creating stable ultrashallow junctions when low-temperature processing is employed. Our results propose Sb as a viable alternative to As for the creation of highly activated, low resistance ultrashallow junctions for use with strain-engineered CMOS devices
This paper is made available online in accordance with publisher policies. Please scroll down to vie...
The growth of smooth and abrupt heteroepitaxial semiconductor interfaces is limited by strain origin...
International audienceWe report a novel approach for engineering tensely strained Si layers on a rel...
The creation of stable, highly conductive ultrashallow junctions in strained Si is a key requirement...
The creation of highly conductive ultrashallow-doped regions in strained Si is a key requirement for...
The ability to create stable, highly conductive ultrashallow doped regions is a key requirement for ...
CMOS scaling is rapidly reaching physical limits, forcing the industry to consider alternative route...
The production of low resistance ultra-shallow junctions for e.g. source/drain extensions using low ...
The production of low resistance ultra-shallow junctions for e.g. source/drain extensions using low ...
A systematic study of the impact of As+ ion implantation on strain relaxation and dopant activation ...
Incorporation of implanted antimony (Sb) in strained-silicon (s-Si) formed on relaxed-SiGe virtual s...
CMOS scaling is rapidly reaching physical limits, forcing the industry to consider alternative route...
In this study, material investigations of strained Si/SiGe platforms for MOSFET applications are pre...
The impact of different defect-engineering parameters on the electrical performance of p-n junctions...
peer reviewedAs scaling of the critical transistor dimensions below 65 nm has been slowed down, the ...
This paper is made available online in accordance with publisher policies. Please scroll down to vie...
The growth of smooth and abrupt heteroepitaxial semiconductor interfaces is limited by strain origin...
International audienceWe report a novel approach for engineering tensely strained Si layers on a rel...
The creation of stable, highly conductive ultrashallow junctions in strained Si is a key requirement...
The creation of highly conductive ultrashallow-doped regions in strained Si is a key requirement for...
The ability to create stable, highly conductive ultrashallow doped regions is a key requirement for ...
CMOS scaling is rapidly reaching physical limits, forcing the industry to consider alternative route...
The production of low resistance ultra-shallow junctions for e.g. source/drain extensions using low ...
The production of low resistance ultra-shallow junctions for e.g. source/drain extensions using low ...
A systematic study of the impact of As+ ion implantation on strain relaxation and dopant activation ...
Incorporation of implanted antimony (Sb) in strained-silicon (s-Si) formed on relaxed-SiGe virtual s...
CMOS scaling is rapidly reaching physical limits, forcing the industry to consider alternative route...
In this study, material investigations of strained Si/SiGe platforms for MOSFET applications are pre...
The impact of different defect-engineering parameters on the electrical performance of p-n junctions...
peer reviewedAs scaling of the critical transistor dimensions below 65 nm has been slowed down, the ...
This paper is made available online in accordance with publisher policies. Please scroll down to vie...
The growth of smooth and abrupt heteroepitaxial semiconductor interfaces is limited by strain origin...
International audienceWe report a novel approach for engineering tensely strained Si layers on a rel...