International audienceIn the development of embedded systems, Instruction-Set Simulators (ISS) plays an important role. When using an ISS, simulation speed is a significant issue. In this paper, we present a dynamic translation technique that uses the LLVM open-source compiler infrastructure to increase the simulation speed. Our dynamic translation technique translates hot basic blocks of the target instruction set into LLVM bitcode, and compiles LLVM bitcode into host binary code using the LLVM Just-In-Time (JIT) compiler. We have simulated the same programs using LLVM-based dynamic translation and using traditional dynamic translation to compare their performance. The experiments show that the dynamic translation based on LLVM increases s...
This thesis presents new simulation techniques designed to speed up the simulation of microprocesso...
System simulators are essential for the exploration, evaluation, and verification of manycore proces...
In this paper, we present new techniques which further improve the static compiled instruction set a...
International audienceIn the development of embedded systems, Instruction-Set Simulators (ISS) plays...
International audienceIn the development of embedded systems, Instruction-Set Simulators (ISS) plays...
Time-to-market is a critical factor in the commercial success of new consumer devices. To minimise d...
Abstract. Development of future generation computer architectures re-quires fast and accurate simula...
International audienceVirtual prototyping of MPSoCs requires fast processor simulation models. Dynam...
ISBN 978-1-61284-208-0International audienceThis paper presents a strategy to speed-up the simulatio...
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translatio...
International audienceInstruction-Set Simulators (ISS) are indispensable tools for studying new arch...
International audienceMany of the recently announced integrated manycore architectures targeting spe...
International audienceDynamic binary translation is a processor emulation technology that allows to ...
Instruction set simulators are critical tools for the explo-ration and validation of new programmabl...
Abstract In recent years multi-core processors have seen broad adoption in application domains rangi...
This thesis presents new simulation techniques designed to speed up the simulation of microprocesso...
System simulators are essential for the exploration, evaluation, and verification of manycore proces...
In this paper, we present new techniques which further improve the static compiled instruction set a...
International audienceIn the development of embedded systems, Instruction-Set Simulators (ISS) plays...
International audienceIn the development of embedded systems, Instruction-Set Simulators (ISS) plays...
Time-to-market is a critical factor in the commercial success of new consumer devices. To minimise d...
Abstract. Development of future generation computer architectures re-quires fast and accurate simula...
International audienceVirtual prototyping of MPSoCs requires fast processor simulation models. Dynam...
ISBN 978-1-61284-208-0International audienceThis paper presents a strategy to speed-up the simulatio...
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translatio...
International audienceInstruction-Set Simulators (ISS) are indispensable tools for studying new arch...
International audienceMany of the recently announced integrated manycore architectures targeting spe...
International audienceDynamic binary translation is a processor emulation technology that allows to ...
Instruction set simulators are critical tools for the explo-ration and validation of new programmabl...
Abstract In recent years multi-core processors have seen broad adoption in application domains rangi...
This thesis presents new simulation techniques designed to speed up the simulation of microprocesso...
System simulators are essential for the exploration, evaluation, and verification of manycore proces...
In this paper, we present new techniques which further improve the static compiled instruction set a...