In the aftermath of Spectre and Meltdown researchers have proposed a variety of attack detection solutions by applying machine learning to data collected from hardware performance monitoring units. Although many microarchitectural attack detection systems provide high-accuracy detection results, the behavior of the underlying data collection mechanisms is not well described or understood. This research introduces the MicroArchitectural Data Framework And Methodology (MADFAM) to prescribe a systematic approach to collecting and preserving the information available in sequences of microarchitectural data. The proposed framework focuses on hardware performance counters (HPCs) as the primary data source. HPC configuration is complex, which make...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
Recent research has uncovered a broad class of security vulnerabilities in which confidential data i...
We introduce the usage of hardware performance counters (HPCs) as a new method that allows very prec...
The interactions between software and hardware are increasingly important to computer system securit...
Over the past decades, the major objectives of computer design have been to improve performance and ...
Shared microarchitectural state is a target for side-channel attacks that leverage timing measuremen...
International audienceThe increasing complexity of modern microprocessors created new attack areas. ...
The sharing of hardware components in modern processors helps to achieve high performance and meet t...
Historically, performance has been the most important feature when optimizing computer hardware. Mod...
Despite the use of modern anti-virus (AV) software, malware is a prevailing threat to today's comput...
Micro-architectural side-channel-attacks are presently daunting threats to most mathematically elega...
International audienceMicroarchitectural attacks exploit target hardware properties to break softwar...
Cache timing attacks use shared caches in multi-core processors as side channels to extract informat...
The growing Internet of Things (IoT) market demands side-channel attack resistant, efficient, crypto...
Studies in the past have investigated the feasibility of using HPCs (Hardware Performance Counters) ...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
Recent research has uncovered a broad class of security vulnerabilities in which confidential data i...
We introduce the usage of hardware performance counters (HPCs) as a new method that allows very prec...
The interactions between software and hardware are increasingly important to computer system securit...
Over the past decades, the major objectives of computer design have been to improve performance and ...
Shared microarchitectural state is a target for side-channel attacks that leverage timing measuremen...
International audienceThe increasing complexity of modern microprocessors created new attack areas. ...
The sharing of hardware components in modern processors helps to achieve high performance and meet t...
Historically, performance has been the most important feature when optimizing computer hardware. Mod...
Despite the use of modern anti-virus (AV) software, malware is a prevailing threat to today's comput...
Micro-architectural side-channel-attacks are presently daunting threats to most mathematically elega...
International audienceMicroarchitectural attacks exploit target hardware properties to break softwar...
Cache timing attacks use shared caches in multi-core processors as side channels to extract informat...
The growing Internet of Things (IoT) market demands side-channel attack resistant, efficient, crypto...
Studies in the past have investigated the feasibility of using HPCs (Hardware Performance Counters) ...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
Recent research has uncovered a broad class of security vulnerabilities in which confidential data i...
We introduce the usage of hardware performance counters (HPCs) as a new method that allows very prec...