Cmos Rf Low-Noise Amplifier Design For Wireless Communication

Design and optimization of a CMOS low-noise amplifier have been presented. Typical noise parameters such as minimum noise figure, equivalent noise resistance, and optimum source conductance using deep submicron CMOS technology including effect of bias-dependent gate resistance of the MOSFET are derived. Noise parameters, gain, and power consumption are simultaneously optimized using closed-form analytical equations. The analytical equations provide fast turn-around design time in mixed-signal ICs for telecommunication applications