On the modeling and testing of VHDL behavioral descriptions of sequential circuits

website : http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?tp=&arnumber=410674&isnumber=9191International audienceA new automatic test generation principle based on a formal modeling of VHDL behavioral descriptions is proposed. Using to the finite state machine representation and a formalism close to that of Petri nets, the authors define two models which represent all the concepts associated with a VHDL description. They then propose a generation principle which uses both forward and backward time processin