The boundary scan technique and the unified built-in self-test (BIST) scheme are combined in order to develop a strategy suitable for manufacture, field testing and concurrent error detection for integrated circuits and board interconnects. Such unification of offline and online testing plays a major role in the design for board testability of self-checking boards. This unified test strategy is primarily aimed at critical application designs: transportation systems, and nuclear plant
ISBN: 081869064XAn improved self-checking solution for the sequencing part of the MC 68000 microproc...
A Built-in self-test technique constitute a class of algorithms that provide the capability of perfo...
[I]. Note that manufacturing test is applied to every device multiple times, at different voltage le...
The testing of printed circuit board (PCB) interconnects is a complex task that requires enormous am...
ISBN: 0818608676An original BIST (built-in self-test) scheme is proposed to cover some shortcomings ...
The authors analyse off-chip and on-chip signature checking schemes suitable for boundary scan (BS) ...
The automatic generation of a hierarchical self-test architecture for boards with boundary scan test...
Self-checking circuits are used to ensure concurrent error detection for online test of integrated c...
A built-in self-test (BIST) methodology to test system backplanes by using BIST functionality in eac...
This thesis is concerned with the practical implications of manufacture testing of loaded printed ci...
ISBN: 0818654406First presents a self-checking implementation for RAMs. Then, the unified BIST techn...
The test technique called "boundary scan test" (BST) offers new opportunities in testing but confron...
Boundary scan is now the most promising technology for testing high-complexity printed circuit board...
The progress in the fields of miniaturisation (surface mount technology, large pin count ICs, etc.) ...
The boundary scan standard which has been in existence since the early nineties is widely used to te...
ISBN: 081869064XAn improved self-checking solution for the sequencing part of the MC 68000 microproc...
A Built-in self-test technique constitute a class of algorithms that provide the capability of perfo...
[I]. Note that manufacturing test is applied to every device multiple times, at different voltage le...
The testing of printed circuit board (PCB) interconnects is a complex task that requires enormous am...
ISBN: 0818608676An original BIST (built-in self-test) scheme is proposed to cover some shortcomings ...
The authors analyse off-chip and on-chip signature checking schemes suitable for boundary scan (BS) ...
The automatic generation of a hierarchical self-test architecture for boards with boundary scan test...
Self-checking circuits are used to ensure concurrent error detection for online test of integrated c...
A built-in self-test (BIST) methodology to test system backplanes by using BIST functionality in eac...
This thesis is concerned with the practical implications of manufacture testing of loaded printed ci...
ISBN: 0818654406First presents a self-checking implementation for RAMs. Then, the unified BIST techn...
The test technique called "boundary scan test" (BST) offers new opportunities in testing but confron...
Boundary scan is now the most promising technology for testing high-complexity printed circuit board...
The progress in the fields of miniaturisation (surface mount technology, large pin count ICs, etc.) ...
The boundary scan standard which has been in existence since the early nineties is widely used to te...
ISBN: 081869064XAn improved self-checking solution for the sequencing part of the MC 68000 microproc...
A Built-in self-test technique constitute a class of algorithms that provide the capability of perfo...
[I]. Note that manufacturing test is applied to every device multiple times, at different voltage le...