Flexible design flow for behavioral synthesis. An effective approach for tool integration

Behavioral synthesis takes an algorithmic description of the circuit where there is neither clock information nor structural information. This flow produces a circuit description composed of transfers between registers. Then, the register transfer level (RTL) synthesis produces a netlist using a library from a specific fabrication technology. These two synthesis tasks may be sequenced within the same design flow. However, both synthesis tools could execute some synthesis refinements. This paper discusses the implementation of a new design flow with flexible frontiers between behavioral and RTL synthesis tools. Our results show that it is worthwhile to give the designer this extended degree of freedom, since the best solution is not always the result of a specific design flow