In this paper, we present a cosimulation environment that provides modularity, scalability, and flexibility in cosimulation of SoC designs with heterogeneous multi-processor target architectures. Our cosimulation environment is based on an object-oriented simulation environment, SystemC. Exploiting the object orientation in SystemC representation, we achieve modularity and scalability of cosimulation by developing modular cosimulation interfaces. The object orientation also enables mixed-level cosimulation to be easily implemented; thereby the designer can have flexibility in trade off between simulation performance and accuracy. Experiments with an IS-95 CDMA cellular phone system design show the effectiveness of the cosimulation environme...
To improve productivity and design space exploration in MOEMS design, new high levels specification ...
Abstract In this paper, we present a hardware-software cosimulation environment for heterogeneous s...
Abstract. Semiconductor technology miniaturization allows designers to pack more and more transistor...
In communication refinement with multiple communication proto-cols and abstraction levels, the syste...
In this paper we propose a method of mixed-level cosimulation that enables gradual refinement of SoC...
This paper addresses the applicability of a cosimulation methodology to multi-domain and multi-langu...
For functional validation of heterogeneous embedded systems, hardware/software (Hw/Sw) cosimulation ...
Hardware/software codesign seeks to integrate system level, hardware, and software design. Ideally, ...
SystemC is becoming the reference language for hardware description in EDA community. It is suitable...
Abstract- In this paper, we present a hardware-software cosimulation environment for heterogeneous s...
International audienceThis paper deals with distributed cosimulation for heterogeneous systems proto...
International audienceThis paper deals with distributed cosimulation for heterogeneous systems proto...
In this paper we present a distributed simulation environment for System-on-Chip (SoC) design. Our a...
Heterogeneous embedded systems, where configurable or application specific hardware devices (FPGAs a...
We deal with hardware block interconnection in Systems-on-Chip. The cost of writing the glue code gr...
To improve productivity and design space exploration in MOEMS design, new high levels specification ...
Abstract In this paper, we present a hardware-software cosimulation environment for heterogeneous s...
Abstract. Semiconductor technology miniaturization allows designers to pack more and more transistor...
In communication refinement with multiple communication proto-cols and abstraction levels, the syste...
In this paper we propose a method of mixed-level cosimulation that enables gradual refinement of SoC...
This paper addresses the applicability of a cosimulation methodology to multi-domain and multi-langu...
For functional validation of heterogeneous embedded systems, hardware/software (Hw/Sw) cosimulation ...
Hardware/software codesign seeks to integrate system level, hardware, and software design. Ideally, ...
SystemC is becoming the reference language for hardware description in EDA community. It is suitable...
Abstract- In this paper, we present a hardware-software cosimulation environment for heterogeneous s...
International audienceThis paper deals with distributed cosimulation for heterogeneous systems proto...
International audienceThis paper deals with distributed cosimulation for heterogeneous systems proto...
In this paper we present a distributed simulation environment for System-on-Chip (SoC) design. Our a...
Heterogeneous embedded systems, where configurable or application specific hardware devices (FPGAs a...
We deal with hardware block interconnection in Systems-on-Chip. The cost of writing the glue code gr...
To improve productivity and design space exploration in MOEMS design, new high levels specification ...
Abstract In this paper, we present a hardware-software cosimulation environment for heterogeneous s...
Abstract. Semiconductor technology miniaturization allows designers to pack more and more transistor...