This paper presents a new method for behavioural partitioning at the system level. The method is based on an extended finite state machine model. Partitioning is achieved through the use of five system-level primitives: Move, Merge, Split, Cut and Map. The result of the partitioning is a set of interconnected sub-systems. Partitioning is done interactively by successive application of these primitives. This allows an interactive exploration of the solution space. The partitioning tool has been implemented with a graphical interface and could be used even with on-line command
The complexity in automotive systems engineering is increasing over the last decade. In particular, ...
We propose in this paper an algebraic approach to hardware/software partitioning in Verilog HDL. We ...
We propose in this paper an algebraic approach to hardware/software partitioning in Verilog HDL. We ...
International audienceThis paper presents a methodology and a tool for system-level partitioning in ...
This paper presents a methodology and a tool box for system-level partitioning in the behavioral dom...
This paper addresses fundamental aspects of system modelling and partitioning algorithms in the area...
The partitioning of complex processor models on the gate and register-transfer level for parallel fu...
Since the hardware-software partitioning problem is a key aspect of the codesign of digital electron...
. We discuss the implementation and evaluation of move-based hypergraph partitioning heuristics in t...
This paper presents a novel technique to perform dynamic high-level exploration of a behavioral spec...
Many high-performance embedded real-time systems are today implemented heterogeneously, with some pa...
The tutorial introduces the partitioning with applications to VLSI circuit designs. The problem form...
The application of Evolutionary Algorithms in hierarchical model partitioning for parallel system si...
Many approaches have been developed to partition a system's behavioral description before a structur...
Partitioning a system's functionality among interacting hardware and software components is an impor...
The complexity in automotive systems engineering is increasing over the last decade. In particular, ...
We propose in this paper an algebraic approach to hardware/software partitioning in Verilog HDL. We ...
We propose in this paper an algebraic approach to hardware/software partitioning in Verilog HDL. We ...
International audienceThis paper presents a methodology and a tool for system-level partitioning in ...
This paper presents a methodology and a tool box for system-level partitioning in the behavioral dom...
This paper addresses fundamental aspects of system modelling and partitioning algorithms in the area...
The partitioning of complex processor models on the gate and register-transfer level for parallel fu...
Since the hardware-software partitioning problem is a key aspect of the codesign of digital electron...
. We discuss the implementation and evaluation of move-based hypergraph partitioning heuristics in t...
This paper presents a novel technique to perform dynamic high-level exploration of a behavioral spec...
Many high-performance embedded real-time systems are today implemented heterogeneously, with some pa...
The tutorial introduces the partitioning with applications to VLSI circuit designs. The problem form...
The application of Evolutionary Algorithms in hierarchical model partitioning for parallel system si...
Many approaches have been developed to partition a system's behavioral description before a structur...
Partitioning a system's functionality among interacting hardware and software components is an impor...
The complexity in automotive systems engineering is increasing over the last decade. In particular, ...
We propose in this paper an algebraic approach to hardware/software partitioning in Verilog HDL. We ...
We propose in this paper an algebraic approach to hardware/software partitioning in Verilog HDL. We ...