Add to ORKGInternational audienceA memory cell, called HIT cell (heavy ion tolerant cell), designed to be SEU-immune is presented. Compared to previously reported design hardened solutions, the HIT cell is less SEU-sensitive, features better electrical performances and consumes less silicon area
This invention is comprised of a logical memory latch and cell, using logic and circuit modification...
The 21st century is witnessing a tremendous demand for transistors. Life amenities have incorporated...
Radiation from terrestrial and space environments is a great danger to integrated circuits (ICs). A ...
The implementation of semiconductor circuits and systems in nano-technology makes it possible to ach...
International audienceA novel memory structure, designed to tolerate SEU perturbations, has been imp...
Technology scaling of CMOS devices has made the integrated circuits vulnerable to single event radia...
A novel DRAM cell technology consisting of an n-channel access transistor and a bootstrapped storage...
In radioactive environments, particle strikes can induce transient errors in integrated circuits (IC...
Abstract In this paper, we present a new radiation tolerant CMOS standard cell library, and demonst...
In the electronics space industry, memory cells are one of the main concerns, especially in term of ...
A novel design technique is proposed for storage elements which are insensitive to radiation-induced...
When exposed to an harsh environment in space, high atmosphere or even on earth, Integrated Circuits...
Static random access memory cells (SRAM) are high-speed semiconductor memory that uses flip-flop to...
Soft Error Rates (SER) of hardened and unhardened SRAM cells need to be experimentally characterized...
The SEU hardness of a new CMOS storage cell based on latch redundancy has been analyzed using a lase...
This invention is comprised of a logical memory latch and cell, using logic and circuit modification...
The 21st century is witnessing a tremendous demand for transistors. Life amenities have incorporated...
Radiation from terrestrial and space environments is a great danger to integrated circuits (ICs). A ...
The implementation of semiconductor circuits and systems in nano-technology makes it possible to ach...
International audienceA novel memory structure, designed to tolerate SEU perturbations, has been imp...
Technology scaling of CMOS devices has made the integrated circuits vulnerable to single event radia...
A novel DRAM cell technology consisting of an n-channel access transistor and a bootstrapped storage...
In radioactive environments, particle strikes can induce transient errors in integrated circuits (IC...
Abstract In this paper, we present a new radiation tolerant CMOS standard cell library, and demonst...
In the electronics space industry, memory cells are one of the main concerns, especially in term of ...
A novel design technique is proposed for storage elements which are insensitive to radiation-induced...
When exposed to an harsh environment in space, high atmosphere or even on earth, Integrated Circuits...
Static random access memory cells (SRAM) are high-speed semiconductor memory that uses flip-flop to...
Soft Error Rates (SER) of hardened and unhardened SRAM cells need to be experimentally characterized...
The SEU hardness of a new CMOS storage cell based on latch redundancy has been analyzed using a lase...
This invention is comprised of a logical memory latch and cell, using logic and circuit modification...
The 21st century is witnessing a tremendous demand for transistors. Life amenities have incorporated...
Radiation from terrestrial and space environments is a great danger to integrated circuits (ICs). A ...