ISBN: 3540441433This paper presents a new architecture of analog-to-digital converter (ADC) for low-power applications. The converter is a tracking circuit without any global clock, based on an asynchronous design. Samples conversion is only triggered by the analog input signal amplitude variations, hence an irregular sampling of it. System simulations demonstrate that a significant reduction of the circuit activity can be achieved with it. Moreover, such a converter has been designed with 6-bit resolution, using a 0.18- mu m, 1.8-V standard CMOS technology from ST-Microelectronics. Electrical simulations show that, the asynchronous converter has an average power dissipation of only 1.9mW in the worst case, with a sample conversion time of ...
Graduation date: 2011Advances in process technologies have led to the development of low-power high ...
Analog-to-digital converters (ADCs) are key design blocks and are currently adopted in many applicat...
This article reviews design challenges for low-power CMOS high-speed analog-to-digital converters (A...
ISBN 1-59593-137-6This paper discusses the development of a new kind of low power processing chain w...
This work is a contribution to a drastic change in standard signal processing chains. The main objec...
A new ADC architecture is devised. This architecture is memory based, in which the last sample is us...
International audienceWe present a new class of Analog-to-Digital Converters (ADCs), based on an irr...
We present a new class of asynchronous analog to digital converters (A-ADCs), based on an level-cros...
Analog-to-digital converters (ADCs) are key design blocks and are currently adopted in many applicat...
The increasing digitalization in electronics applications requires analogue-to-digital converters (A...
International audienceWe present a new class of Asynchronous Analog to Digital Converters (A-ADCs), ...
International audienceWe present a new class of Asynchronous Analog to Digital Converters (A-ADCs), ...
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Comp...
Analog-to-digital converters (ADCs) are key design blocks in modern microelectronic digital communic...
Abstract-Analog-to-digital converters (ADCs) are key design blocks in modern microelectronic digital...
Graduation date: 2011Advances in process technologies have led to the development of low-power high ...
Analog-to-digital converters (ADCs) are key design blocks and are currently adopted in many applicat...
This article reviews design challenges for low-power CMOS high-speed analog-to-digital converters (A...
ISBN 1-59593-137-6This paper discusses the development of a new kind of low power processing chain w...
This work is a contribution to a drastic change in standard signal processing chains. The main objec...
A new ADC architecture is devised. This architecture is memory based, in which the last sample is us...
International audienceWe present a new class of Analog-to-Digital Converters (ADCs), based on an irr...
We present a new class of asynchronous analog to digital converters (A-ADCs), based on an level-cros...
Analog-to-digital converters (ADCs) are key design blocks and are currently adopted in many applicat...
The increasing digitalization in electronics applications requires analogue-to-digital converters (A...
International audienceWe present a new class of Asynchronous Analog to Digital Converters (A-ADCs), ...
International audienceWe present a new class of Asynchronous Analog to Digital Converters (A-ADCs), ...
Thesis: Ph. D., Massachusetts Institute of Technology, Department of Electrical Engineering and Comp...
Analog-to-digital converters (ADCs) are key design blocks in modern microelectronic digital communic...
Abstract-Analog-to-digital converters (ADCs) are key design blocks in modern microelectronic digital...
Graduation date: 2011Advances in process technologies have led to the development of low-power high ...
Analog-to-digital converters (ADCs) are key design blocks and are currently adopted in many applicat...
This article reviews design challenges for low-power CMOS high-speed analog-to-digital converters (A...