The SYCO system is a silicon compiler for VLSI ASICs specified by algorithms. SYCO starts from an algorithmic description and produces a circuit that realises the algorithm. Although SYCO starts from a high-level hardware description language, the translation scheme from algorithmic description to layout is easy to understand, and there is a correspondence between the input description and the layout. Consequently the designer may easily modify the input description in order to force the compiler to produce a given result
The next decade of computing will be dominated by embedded systems, information appliances and appli...
Deals with CPC, the SYCO control section synthesizer. CPC receives a hierarchical high level descrip...
The utilization of application specific instruction-set processors (ASIPs) allows for realizing Syst...
ISBN: 9024735610The SYCO system is a silicon compiler for VLSI ASICs specified by algorithms. The SY...
International audienceThe principles of SYCO are explained and its characteristics compared with tho...
Architecture experimentation with the SYCO silicon compiler is described. It is noted that, although...
We explain how programs specified in a sequential programming language can be translated automatical...
Design of general/special purpose supercomputing VLSI systems for numeric algorithm execution involv...
Silicon compilation is a term used for many different purposes. In this paper we define silicon comp...
Progress in digital technology has yielded continuing growth in the complexity of circuits that can ...
This thesis describes the background and implementation of a novel silicon compiler from a high-leve...
We present a software oriented approach to hardware/software codesign by applying traditional compil...
This thesis presents a cosynthesis tool designed to target single IC platforms containing both uncom...
A silicon compiler for bit-serial signal-processing architecture is described. Some of its features ...
Miss Manners is a synchronizer generator that will produce the layout of a synchronizer given a high...
The next decade of computing will be dominated by embedded systems, information appliances and appli...
Deals with CPC, the SYCO control section synthesizer. CPC receives a hierarchical high level descrip...
The utilization of application specific instruction-set processors (ASIPs) allows for realizing Syst...
ISBN: 9024735610The SYCO system is a silicon compiler for VLSI ASICs specified by algorithms. The SY...
International audienceThe principles of SYCO are explained and its characteristics compared with tho...
Architecture experimentation with the SYCO silicon compiler is described. It is noted that, although...
We explain how programs specified in a sequential programming language can be translated automatical...
Design of general/special purpose supercomputing VLSI systems for numeric algorithm execution involv...
Silicon compilation is a term used for many different purposes. In this paper we define silicon comp...
Progress in digital technology has yielded continuing growth in the complexity of circuits that can ...
This thesis describes the background and implementation of a novel silicon compiler from a high-leve...
We present a software oriented approach to hardware/software codesign by applying traditional compil...
This thesis presents a cosynthesis tool designed to target single IC platforms containing both uncom...
A silicon compiler for bit-serial signal-processing architecture is described. Some of its features ...
Miss Manners is a synchronizer generator that will produce the layout of a synchronizer given a high...
The next decade of computing will be dominated by embedded systems, information appliances and appli...
Deals with CPC, the SYCO control section synthesizer. CPC receives a hierarchical high level descrip...
The utilization of application specific instruction-set processors (ASIPs) allows for realizing Syst...