ISBN: 0780307607A technique allowing the transformation of any RAM test algorithm to a transparent built-in self-test (BIST) algorithm is described. At the end of the test session the contents of the RAM are equal to its initial contents. Thus, the transparent BIST is suitable for periodic testing. The transparent BIST algorithm does not decrease the fault coverage of the initial algorithms and involves a slightly greater area than the standard BIST. The transparent BIST can be used for both fabrication testing and periodic testing
An important achievement in the functional diagnostics of memory devices is the development and appl...
Traditional tests for memories are based on conventional fault models, involving the address decoder...
This paper deals with memory testing principles, focusing mainly on March algorithms. It describes t...
The paper introduces the new concept of symmetric transparent BIST for RAMs. This concept allows to ...
ISBN: 0818654406First presents a self-checking implementation for RAMs. Then, the unified BIST techn...
ISBN 0-7695-2566-0International audienceWe present an original transparent-based programmable memory...
ISBN: 0818631104An efficient BIST architecture for RAMs that is based on M. Marinescu's (1982) algor...
With continuous technology scaling, both quality and reliability are becoming major concer...
The design and architecture of a reconfigurable memory BIST unit is presented. The proposed memory B...
The paper presents a general BIST scheme for the test of RAMs (single and multi-port) embedded in ve...
Embedded random access memories (RAMs) are increasingly being tested using built-in self-test (BIST)...
ISBN: 0818621575The authors present a novel approach to the test of multi-port RAMs. A novel fault m...
Conventional march memory tests have high fault coverage, especially for simple faults like stack-at...
A built-in self-test (BIST) methodology to test system backplanes by using BIST functionality in eac...
[[abstract]]© 1999 Institute of Electrical and Electronics Engineers - The programmable BIST design ...
An important achievement in the functional diagnostics of memory devices is the development and appl...
Traditional tests for memories are based on conventional fault models, involving the address decoder...
This paper deals with memory testing principles, focusing mainly on March algorithms. It describes t...
The paper introduces the new concept of symmetric transparent BIST for RAMs. This concept allows to ...
ISBN: 0818654406First presents a self-checking implementation for RAMs. Then, the unified BIST techn...
ISBN 0-7695-2566-0International audienceWe present an original transparent-based programmable memory...
ISBN: 0818631104An efficient BIST architecture for RAMs that is based on M. Marinescu's (1982) algor...
With continuous technology scaling, both quality and reliability are becoming major concer...
The design and architecture of a reconfigurable memory BIST unit is presented. The proposed memory B...
The paper presents a general BIST scheme for the test of RAMs (single and multi-port) embedded in ve...
Embedded random access memories (RAMs) are increasingly being tested using built-in self-test (BIST)...
ISBN: 0818621575The authors present a novel approach to the test of multi-port RAMs. A novel fault m...
Conventional march memory tests have high fault coverage, especially for simple faults like stack-at...
A built-in self-test (BIST) methodology to test system backplanes by using BIST functionality in eac...
[[abstract]]© 1999 Institute of Electrical and Electronics Engineers - The programmable BIST design ...
An important achievement in the functional diagnostics of memory devices is the development and appl...
Traditional tests for memories are based on conventional fault models, involving the address decoder...
This paper deals with memory testing principles, focusing mainly on March algorithms. It describes t...