ISBN: 0818689633International audienceThe authors deal with the detailed VLSI implementation of a fast bit-serial operator designed to perform very high precision (600 decimal digits) additions, multiplications, and divisions, and some of the applications of the circuit are discussed. Online arithmetic needs carry-free redundant number systems. Frequently, the radix chosen is different from 2, since a carry-free addition algorithm can be used in radix r not=2. In radix 2, carry-free addition is possible, but with two inconveniences: the algorithm seems more complicated, and the delay is larger. The authors show that the first inconvenience vanishes if good binary representation of the digits in radix-2 signed digit notation is chosen
In this paper we present the design of a new high speed multiplication unit. The design is based on ...
Redundant Number Systems have been widely used in fast arithmetic circuits design. Signed-Digit (SD)...
In this paper we present the design of a new high speed multiplication unit. THe design is based on ...
ISBN: 0818689633International audienceThe authors deal with the detailed VLSI implementation of a fa...
In this work, we present some VLSI structures suitable for on-line arithmetic embedded algorithms us...
[[abstract]]We propose an asymmetric high-radix signed-digit (AHSD) number system for fast binary ad...
ISBN: 0818669055The digit-recurrence division relies on a sequence of addition/subtraction and shift...
Abstract—Traditionally higher radix values of the form β = 2r have been employed for recoding of mul...
ISBN: 0818642300We present some VLSI structures suitable for online arithmetic embedded algorithms u...
: The digit-recurrence division relies on a sequence of addition/subtraction and shift operations i...
This paper presents a derivation of four radix-2 division algorithms by digit recurrence. Each divis...
The continuing demand for technological advances while dealing with mutual constraining characterist...
We propose the first hardware implementation of standard arithmetic operators – addition, multiplica...
[[abstract]]A novel floating-point division architecture with IEEE 754-1985 standard is proposed in ...
International audienceThe new generation of high-performance decimal floating-point units (DFUs) is ...
In this paper we present the design of a new high speed multiplication unit. The design is based on ...
Redundant Number Systems have been widely used in fast arithmetic circuits design. Signed-Digit (SD)...
In this paper we present the design of a new high speed multiplication unit. THe design is based on ...
ISBN: 0818689633International audienceThe authors deal with the detailed VLSI implementation of a fa...
In this work, we present some VLSI structures suitable for on-line arithmetic embedded algorithms us...
[[abstract]]We propose an asymmetric high-radix signed-digit (AHSD) number system for fast binary ad...
ISBN: 0818669055The digit-recurrence division relies on a sequence of addition/subtraction and shift...
Abstract—Traditionally higher radix values of the form β = 2r have been employed for recoding of mul...
ISBN: 0818642300We present some VLSI structures suitable for online arithmetic embedded algorithms u...
: The digit-recurrence division relies on a sequence of addition/subtraction and shift operations i...
This paper presents a derivation of four radix-2 division algorithms by digit recurrence. Each divis...
The continuing demand for technological advances while dealing with mutual constraining characterist...
We propose the first hardware implementation of standard arithmetic operators – addition, multiplica...
[[abstract]]A novel floating-point division architecture with IEEE 754-1985 standard is proposed in ...
International audienceThe new generation of high-performance decimal floating-point units (DFUs) is ...
In this paper we present the design of a new high speed multiplication unit. The design is based on ...
Redundant Number Systems have been widely used in fast arithmetic circuits design. Signed-Digit (SD)...
In this paper we present the design of a new high speed multiplication unit. THe design is based on ...