On the Need for Common Evaluation Methods for Fault Tolerance Costs in Microprocessors

ISBN: 0-7695-2406-0Technological evolution is making Fault Tolerance more and more important in all application fields and it is therefore mandatory to have good strategies to measure its impact on existing systems. A lot of work has been done on fault characterization and modeling, but confusion still abounds when coming to performance loss evaluation. This is especially true for microprocessors, where “performance” is a tricky word to define, cause of a lot of debates and controversies. This article proposes a new and easy-to-apply framework to evaluate performance costs implied by fault tolerance in systems made of both hardware and software. Results are presented on a system based on a Sparc v8 processor and the eCoS operating system