International audienceWe present a new simulation tool for efficient extraction of 3D capacitance matrix in interconnect structures embedded in a multilayered dielectric environment. We use a fictitious domain method, which replaces the initial problem on a complex geometry by a problem on a simple shape domain embedding the initial domain, and is consequently ideally suited for the treatment of complex geometries. Numerical results confirm that this method is more efficient, both in CPU time and memory, than a finite elements or a boundary elements method
Single-level and multi-path interconnect structures embedded in dielectrics on a silicon substrate a...
INTRODUCTION With the decrease of feature sizes and the increase of chip dimensions in integrated c...
Abstract. In this paper, we present a new approach for capacitance matrix calculation of lossy multi...
International audienceWe present a new simulation tool for efficient extraction of 3D capacitance ma...
International audienceWe propose a new approach for fast and accurate extraction of capacitance in m...
International audienceWe propose a new approach for fast and accurate extraction of capacitance in m...
Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, p...
This paper introduces a set of analytical formulations for 3D modelling of inter-layer capacitances....
We present a new algorithm to improve the 3D boundary element method (BEM) for capacitance extractio...
In this paper, we present a novel, non-iterative domain decomposition method, which has been paralle...
For submicron integrated circuits, 3D numerical techniques are required to accu-rately compute the v...
An integral equation formulation for the calculation of the capacitance of three-dimensional VLSI ge...
Compared with traditional algorithms like finite difference, finite element and boundary element met...
Interconnects are an important constituent of any large scale integrated circuit, and accurate inter...
In this paper, we present a new approach for capacitance matrix calculation of lossy multilayer VLSI...
Single-level and multi-path interconnect structures embedded in dielectrics on a silicon substrate a...
INTRODUCTION With the decrease of feature sizes and the increase of chip dimensions in integrated c...
Abstract. In this paper, we present a new approach for capacitance matrix calculation of lossy multi...
International audienceWe present a new simulation tool for efficient extraction of 3D capacitance ma...
International audienceWe propose a new approach for fast and accurate extraction of capacitance in m...
International audienceWe propose a new approach for fast and accurate extraction of capacitance in m...
Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, p...
This paper introduces a set of analytical formulations for 3D modelling of inter-layer capacitances....
We present a new algorithm to improve the 3D boundary element method (BEM) for capacitance extractio...
In this paper, we present a novel, non-iterative domain decomposition method, which has been paralle...
For submicron integrated circuits, 3D numerical techniques are required to accu-rately compute the v...
An integral equation formulation for the calculation of the capacitance of three-dimensional VLSI ge...
Compared with traditional algorithms like finite difference, finite element and boundary element met...
Interconnects are an important constituent of any large scale integrated circuit, and accurate inter...
In this paper, we present a new approach for capacitance matrix calculation of lossy multilayer VLSI...
Single-level and multi-path interconnect structures embedded in dielectrics on a silicon substrate a...
INTRODUCTION With the decrease of feature sizes and the increase of chip dimensions in integrated c...
Abstract. In this paper, we present a new approach for capacitance matrix calculation of lossy multi...