International audienceModern systems-on-chips need sophisticated power-management policies to control their power consumption and temperature. These power-management policies are usually implemented partly in software, with hardware support. They need to be validated early, hence power and temperature-aware simulation techniques at the system-level need to be developed. Existing approaches for system-level power and thermal analysis usually either completely abstract the functionality (allowing only simple scenarios to be simulated), or run the functional simulation independently from the non-functional one. The approach presented in this paper allows a coupled simulation of a SystemC/TLM model, possibly including the actual embedded softwa...
This paper presents a new methodology to study power and energy consumption in mechatronic systems e...
Small transistors and high clock frequency have resulted in high power density, which makes temperat...
International audienceAs the feature size decrease with each process generation, and nominal SoC des...
International audienceModern systems-on-a-chip are equipped with power architectures, allowing to co...
International audienceThe ability to perform power estimation early in the design flow is becoming m...
International audienceMany techniques and tools exist to estimate the power consumption and the temp...
Temperature is a critical property of smart systems, due to its impact on reliability and to its int...
The continuous advance in technology enables the design of more complex embedded systems making use ...
The use of high-end multicore processors today can incur high power density with significant variabi...
Energy consumption estimation is nowadays one of the most pressing concerns in the design of embedde...
A novel approach to logical and thermal co-simulation of ASIC circuits is presented in this paper. N...
Current integrated circuits exhibit an impressive and in- creasing component density, hence an alar...
[[abstract]]The power dissipation is the concern for SoC designs and embedded systems to extend batt...
This chapter describes a methodology for modeling and simulation of Electrical Energy Systems, based...
Modelling and Simulation is key in aircraft system development. This paper presents a novel, multi-p...
This paper presents a new methodology to study power and energy consumption in mechatronic systems e...
Small transistors and high clock frequency have resulted in high power density, which makes temperat...
International audienceAs the feature size decrease with each process generation, and nominal SoC des...
International audienceModern systems-on-a-chip are equipped with power architectures, allowing to co...
International audienceThe ability to perform power estimation early in the design flow is becoming m...
International audienceMany techniques and tools exist to estimate the power consumption and the temp...
Temperature is a critical property of smart systems, due to its impact on reliability and to its int...
The continuous advance in technology enables the design of more complex embedded systems making use ...
The use of high-end multicore processors today can incur high power density with significant variabi...
Energy consumption estimation is nowadays one of the most pressing concerns in the design of embedde...
A novel approach to logical and thermal co-simulation of ASIC circuits is presented in this paper. N...
Current integrated circuits exhibit an impressive and in- creasing component density, hence an alar...
[[abstract]]The power dissipation is the concern for SoC designs and embedded systems to extend batt...
This chapter describes a methodology for modeling and simulation of Electrical Energy Systems, based...
Modelling and Simulation is key in aircraft system development. This paper presents a novel, multi-p...
This paper presents a new methodology to study power and energy consumption in mechatronic systems e...
Small transistors and high clock frequency have resulted in high power density, which makes temperat...
International audienceAs the feature size decrease with each process generation, and nominal SoC des...