Development of Schottky and MOS interfaces for SiC power devices

The very nature of the wide bandgap semiconductor silicon carbide (SiC), namely its high critical electric field, thermal conductivity and stable native oxide, silicon dioxide (SiO2), has enabled the design, fabrication and market penetration of a new generation of power devices, Schottky barrier diodes (SBDs) and metal-oxide-semiconductor fieldeffect transistors (MOSFETs), with blocking voltages from 600-1700V. Despite the successful commercial realisation of these devices, the surface of SiC and the interfaces it forms with metals (Schottky interface) and insulators (MOS interface), are still the source of reliability problems such as premature breakdown and decreased lifetime of gate oxides on SiC. The focus of this thesis lies on the exploration of passivation approaches to the Schottky interface as well as the investigation of the quality of deposited gate oxides. Firstly, an electrical and physical analysis of the impact of a proposed phosphorous pentoxide (P2O5) treatment on planar and optimised 3.3 kV JBS diodes reveals a reduction of Schottky barrier height as well as leakage current, offering a possible path to overcome the basic trade-off between on-state and off-state performance of a diode. The second part of the thesis focuses on atomic layer deposition (ALD) – deposited SiO2 layers, where a post-deposition annealing (PDA) study reveals the performance improvement when a PDA in forming gas ambient at 1100°C is carried out. This process was then successfully transferred and validated on freestanding 3C-SiC material, which successfully demonstrated the general suitability of this material for power device applications