Automatic High-Level Hardware Checkpoint Selection for Reconfigurable Systems

International audience—Modern FPGAs provide great computational power and flexibility but there is still room for improving their performances. For example multiuser approaches are particularly underdeveloped as they require specific mechanisms still to be automated. Sharing an FPGA resource between applications or users requires a context switch ability. The latter enables pausing and resuming applications at system demand. This paper presents a method that automatically selects a good execution point, called hardware checkpoint, to perform a context switch on an FPGA. The method relies on a static analysis of the finite state machine of a circuit to select the checkpoint states. The obtained selection ensures that the context switch mechanism respects a given latency and tries to minimize the mechanism costs. The method takes advantage of its integration in an open-source HLS tool and preliminary results highlight its efficiency. Index Terms—FPGA, HLS, CAD, hardware context switc