Add to ORKGInternational audienceThe main features of a system devoted to the functional validation of integrated circuits are described. This system is composed of two main blocs: a motherboard for the interface with the user and the control of the circuit under test operations, and a daughterboard in which is implemented a suitable architecture around the circuit to be tested. The THESIC+ version presented in this paper was enhanced in order to significantly simplify the daughterboard hardware developments, whose architecture is fully implemented by means of an FPGA
The thesis deals with integration of functional verification into the design cycle of execution unit...
In this paper, a teaching aid for digital integrated circuit (IC) test development engineering educa...
This paper describes a new hardware/software co-verification method for System-On–a-Chip, based on t...
International audienceThe main features of a system devoted to the functional validation of integrat...
International audienceThis work aims at describing the main features of a system, the so-called THES...
This work deals with verification possibilities of integrated circuits, especially with hardware emu...
ST-Ericsson is a major actor of the semiconductor industry for mobile applications. It provides to h...
Approaches to accomplishing functional control of field-programmable gate arrays (FPGA) are describe...
International audienceWith the miniaturization, integrated circuits become more en more sensitive to...
A previous paper (Henry, 1995a) introduced the technique of hardware compilation as the basis for de...
This thesis presents a modular self-test solution aimed at improving the inefficient troubleshooting...
International audienceMicroprocessor design deals with many types of specifications : from functiona...
In this paper, field programmable gate array (FPGA)-assisted verification platform is devised to enh...
Modern Integrated Circuit (IC) design is characterized by a strong trend of Intellectual Property (I...
This thesis introduces a novel architecture of a run-time reconfigurable microsystem on chip (SoC). ...
The thesis deals with integration of functional verification into the design cycle of execution unit...
In this paper, a teaching aid for digital integrated circuit (IC) test development engineering educa...
This paper describes a new hardware/software co-verification method for System-On–a-Chip, based on t...
International audienceThe main features of a system devoted to the functional validation of integrat...
International audienceThis work aims at describing the main features of a system, the so-called THES...
This work deals with verification possibilities of integrated circuits, especially with hardware emu...
ST-Ericsson is a major actor of the semiconductor industry for mobile applications. It provides to h...
Approaches to accomplishing functional control of field-programmable gate arrays (FPGA) are describe...
International audienceWith the miniaturization, integrated circuits become more en more sensitive to...
A previous paper (Henry, 1995a) introduced the technique of hardware compilation as the basis for de...
This thesis presents a modular self-test solution aimed at improving the inefficient troubleshooting...
International audienceMicroprocessor design deals with many types of specifications : from functiona...
In this paper, field programmable gate array (FPGA)-assisted verification platform is devised to enh...
Modern Integrated Circuit (IC) design is characterized by a strong trend of Intellectual Property (I...
This thesis introduces a novel architecture of a run-time reconfigurable microsystem on chip (SoC). ...
The thesis deals with integration of functional verification into the design cycle of execution unit...
In this paper, a teaching aid for digital integrated circuit (IC) test development engineering educa...
This paper describes a new hardware/software co-verification method for System-On–a-Chip, based on t...