A Methodology for estimating energy consumption of QDI asynchronous circuits

International audienceThis paper presents a new methodology for estimating the energy consumption of Quasi Delay Insensitive (QDI) asynchronous circuits. The estimation corresponds to a gate transition count weighted with the gate sizes. The estimation is embedded in the TAST design flow and is done early in the flow, more precisely at the CHP specification in order to supply to the designer useful information of the energy consumption of a circuit. It is performed in two steps: a structural estimation and a dynamic estimation. The usefulness of this estimation for energy optimization is shown through a data encoding example